/********************************************************************************//*!
 * @file  sample_can_interface.h
 * @brief  CAN Controller Interface.
 * 
 * @details  This file contains the processing for the MCU's CAN controller.
 * 
 * @note  nothing. 
 * 
 * @date <b> History: \<Date\> \<Rev\> \<Keyword\> \<Details\> </b>
 * @date 2024/03/27  ---  #-----  新規作成.
 * 
 **//*******************************************************************************/

#ifndef __SAMPLE_CAN_LOOPBACK_H__
#define __SAMPLE_CAN_LOOPBACK_H__

/***********************************************************************************
 *  includes
 ***********************************************************************************/
#include "FreeRTOS_CLI.h"

/***********************************************************************************
 *  externs 
 ***********************************************************************************/
extern const CLI_Command_Definition_t xCan0to1;
extern const CLI_Command_Definition_t xCan1to0;
extern EventGroupHandle_t xEventGroupFpgaInterface;
extern EventGroupHandle_t xEventGroupCan0Interface;
extern EventGroupHandle_t xEventGroupCan1Interface;
extern EventGroupHandle_t xEventGroupSyncTasks;

extern void MCAN_MCULoopback_Init(void);
extern void MCAN_TXRXviaFPGA_Init(void);

/***********************************************************************************
 *  proto types 
 ***********************************************************************************/

/***********************************************************************************
 *  definitions (define, enum, typedef, etc..) 
 ***********************************************************************************/
#define USE_MCU_CAN_UNITTEST         0   /* 1=Use, 0=Un Use */
#define USE_DEBUG_PRINT     1   /* 1=Print, 0=No print */
#define USE_DEBUG_PRINT_L1  1   /* 1=Print, 0=No print */
#define USE_DEBUG_PRINT_L2  0   /* 1=Print, 0=No print */
#define USE_DEBUG_PRINT_L3  0   /* 1=Print, 0=No print */

#define B0 (1 << 0)     /* Event Group bit[0] */
#define B1 (1 << 1)     /* Event Group bit[1] */
#define B2 (1 << 2)     /* Event Group bit[2] */
#define FPGATASK_BIT    B0
#define C0IFTASK_BIT    B1
#define C1IFTASK_BIT    B2
#define ALL_TASKS_BITS  ( FPGATASK_BIT | C0IFTASK_BIT | C1IFTASK_BIT ) /* All Bits for SYNC */

/* CAN test */
#define USE_CANFD (1U)
/*
 *    CAN_DATASIZE   DLC    BYTES_IN_MB
 *    8              8      kMCAN_8ByteDatafield
 *    12             9      kMCAN_12ByteDatafield
 *    16             10     kMCAN_16ByteDatafield
 *    20             11     kMCAN_20ByteDatafield
 *    24             12     kMCAN_24ByteDatafield
 *    32             13     kMCAN_32ByteDatafield
 *    48             14     kMCAN_48ByteDatafield
 *    64             15     kMCAN_64ByteDatafield
 *
 *  CAN data size (pay load size), DLC and Bytes in Message buffer must align.
 *
 */
#define DLC         (15)
#define BYTES_IN_MB kMCAN_64ByteDatafield
/* If not define USE_CANFD or define it 0, CAN_DATASIZE should be 8. */
#define CAN_DATASIZE (64U)
/* If user need to auto execute the improved timming configuration. */
#define USE_IMPROVED_TIMING_CONFIG (1U)
#define MCAN_CLK_FREQ              CLOCK_GetMCanClkFreq(0U)
#define STDID_OFFSET               (18U)
#define STD_FILTER_OFS 0x0
#if (defined(USE_EXT_FILTER) && USE_EXT_FILTER)
#define EXT_FILTER_OFS 0x4
#endif
#define RX_FIFO0_OFS 0x10U
#if (defined(USE_CANFD) && USE_CANFD)
#define TX_BUFFER_OFS 0x60U
#else
#define TX_BUFFER_OFS 0x20U
#endif
#define MSG_RAM_SIZE (TX_BUFFER_OFS + 8 + CAN_DATASIZE)

#define QUEUE_MESSAGE_TIMEOUT   (0x50000)

enum {
	eIndexCan0 = 0,
	eIndexCan1,
	eIndexCanMAX
};

enum {
	eIndexNodeA = 0,
	eIndexNodeB,
	eIndexNodeMAX
};

// fdt bit
#define FIRST_DATA_TRUE     1
#define FIRST_DATA_FALSE    0
// num bit
#define CAN_NUMBER_0        0
#define CAN_NUMBER_1        1
// dlc bits
#define DATA_LENGTH_0       0   // (0000 | CAN + CAN FD : 0 Byte)
#define DATA_LENGTH_1       1   // (0001 | CAN + CAN FD : 1 Byte)
#define DATA_LENGTH_2       2   // (0010 | CAN + CAN FD : 2 Byte)
#define DATA_LENGTH_3       3   // (0011 | CAN + CAN FD : 3 Byte)
#define DATA_LENGTH_4       4   // (0100 | CAN + CAN FD : 4 Byte)
#define DATA_LENGTH_5       5   // (0101 | CAN + CAN FD : 5 Byte)
#define DATA_LENGTH_6       6   // (0110 | CAN + CAN FD : 6 Byte)
#define DATA_LENGTH_7       7   // (0111 | CAN + CAN FD : 7 Byte)
#define DATA_LENGTH_8       8   // (1000 | CAN + CAN FD : 8 Byte)
#define DATA_LENGTH_12      9   // (1001 | CAN FD : 12 Byte)
#define DATA_LENGTH_16     10   // (1010 | CAN FD : 16 Byte)
#define DATA_LENGTH_20     11   // (1011 | CAN FD : 20 Byte)
#define DATA_LENGTH_24     12   // (1100 | CAN FD : 24 Byte)
#define DATA_LENGTH_32     13   // (1101 | CAN FD : 32 Byte)
#define DATA_LENGTH_48     14   // (1110 | CAN FD : 48 Byte)
#define DATA_LENGTH_64     15   // (1111 | CAN FD : 64 Byte)

#define CAN_FRAMEHEADER_BYTES   8   /* 8Byte */
#define FPGAFIFO_WIDTH_BYTES    4   /* 4Byte */

/************************************************************
 * Transmission event FIFO (1 system) CAN0,1 shared *
 * CAN0,1 implemented in a proprietary format because identification information must be provided. *
 * The information elements stored in the FIFO are other than the payload of the MCU-side CAN controller FIFO. *
 * For both the MCU-side event FIFO and buffer FIFO. *
 * *
 * Custom format *
 * Unique information for the upper 3 bits only. Others follow the MCU FIFO. *
 ************************************************************/
typedef struct _mcan_tx_event_buffer_frame                                      /* Structure of Tx Event Buffer (FIFO) */
{
    struct
    {
        uint32_t id   : 29; /*!< CAN Frame Identifier. */                       /* CANID for addressing (Standard 11bit, Extended 11+18=29bit) */
        uint32_t boe1 :  1; /*!< CAN Frame Type(Buffer or Event). */            /* Buffer FIFO/Event FIFO distinction (Buffer: 0/Event: 1) */
        uint32_t num1 :  1; /*!< CAN Frame Type(CAN0 or CAN1). */               /* CAN0/CAN1 distinguished bit (CAN0:0/CAN1:1) */
        uint32_t fdt1 :  1; /*!< First data. */                                 /* Indicates the first data. (1) */
    };
    struct
    {
        uint32_t txts : 16; /*!< Tx Timestamp or Reserved. */                   /* Tx timestamp 16bit (Event) or reserved bit (Buffer) */
        uint32_t dlc  :  4; /*!< Data Length Code     9 10 11 12 13 14 15 */    /* Indicates the data length. The data length represented by the CAN FD is 0~8, 12, 16, 20, 24, 32, 48, 64Byte */
                            /*!  Number of data bytes 12 16 20 24 32 48 64 */
        uint32_t brs  :  1; /*!< Bit Rate Switch. */                            /* Toggles data phase acceleration with bits added in the CAN FD. 
                                                                                   When this bit is receptive, it speeds up the transfer from the sampling point of the BRS bit, 
                                                                                   and all nodes return to the arbitration phase at the sampling point of the CRC delimiter. */

        uint32_t fdf  :  1; /*!< CAN FD format. */                              /* Bit to distinguish CAN (dominant) or CAN FD (passive) */
        uint32_t et   :  2; /*!< bit[23:22] ET(Event Type). */                  /* ET(Event Type) or EFC(Event FIFO Control) */
                            /*!  bit[23] EFC(Event FIFO Control). */
        uint32_t      :  1; /*!< Reserved. */                                   /* Reserved bit */
        uint32_t rtr  :  1; /*!< CAN Frame Type(DATA or REMOTE). */             /* RTR distinguishes between data frames (dominant) and remote frames (passive). 
                                                                                   It is SRR (passive fixed) for extended formats. It is RRS (dominant fixed) 
                                                                                   instead of RTR for CAN FD. */

        uint32_t xtd  :  1; /*!< CAN Frame Type(STD or EXT). */                 /* Bit to distinguish between standard format (dominant) and extended format (receptive) */
        uint32_t esi  :  1; /*!< CAN Frame Error State Indicator. */            /* Bit added on the CAN FD to represent the error condition of the sending node. 
                                                                                   Indicates dominant when the error is active, and receptive when the error is passive. */

        uint32_t      :  1; /*!< Reserved. */                                   /* Reserved bit */
        uint32_t boe2 :  1; /*!< CAN Frame Type(Buffer or Event). */            /* Buffer FIFO / Event FIFO distinction (Buffer: 0/Event: 1) */
        uint32_t num2 :  1; /*!< CAN Frame Type(CAN0 or CAN1). */               /* CAN0/CAN1 distinguished bit (CAN0:0/CAN1:1) */
        uint32_t fdt2 :  1; /*!< Not First data. */                             /* Indicates non-first data (second data). (0) */
    };
} mcan_tx_event_buffer_frame_t;


/***********************************************************************************
 *  variables
 ***********************************************************************************/
// Data length bytes table
extern const uint32_t DATA_LENGTH_BYTES[16];

/***********************************************************************************
 *  functions 
 ***********************************************************************************/

#endif /* __SAMPLE_CAN_LOOPBACK_H__ */
/***********************************************************************************
 * end of file 
 ***********************************************************************************/
