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Introduction of a tool that can generate floating-point FIR filters

Introduction of a tool that can generate floating-point FIR filters

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Introduction

When implementing FIR filters in FPGAs, floating-point data is generally converted to fixed-point data for processing. Therefore, floating-point data FIR filters can be generated.

In addition, floating-point data type selection and conversion between floating-point and fixed-point data types can be easily performed via macros.

The generated filters are output as HDL, so they can be incorporated into the top design as IP.

__.png Reference: DSP Builder 

 

DSP Builder for

DSP Builder is Altera's DSP design tool. It creates designs in the MathWorks* Simulink* environment and generates HDL. Simulation in Simulink is also possible.

The design method is based on the image of connecting blocks and setting parameters for each block. By setting the target operating frequency, the required number of FFs are automatically inserted.

__.png Reference: DSP Builder  FPGA

 

Many IPs and sample designs are also available.

__.png Ref: DSP Builder (Advanced Blockset) Handbook

Floating-point FIR Filter Implementation Example

Figure 1 shows an example of a floating-point FIR filter implementation using DSP Builder .

Figure 1] Floating-Point Filter Design Example

 

DSP Builder can handle multiple data widths as a vector. The sample is created with 7 tap, so it is indicated as (7) in the figure (Figure 2).

 

Figure 2] Vector Expression

 

Please also refer to the following video content.

__.png Reference: Demonstration of the vector representation function of DSP Builder

 

Example of Data Type Conversion

DSP Builder provides a data type conversion macro, convert. This can be used to select the output data type.

In addition to double and single, selecting Variable precision floating point allows you to select a wider variety of data types. 
 

Fig. 3 Convert Macro

 

Fig. 4 Convert Macro Setting Screen

 

__.png Reference: 4.3.5. Changing Data Type with Convert Blocks and Specifying Output Types

 

Conclusion

In this article, we introduced an example of implementing a FIR filter using DSP Builder, a tool that can handle floating-point data as is . We hope you will find this tool useful, as it contains many design examples.

 

 

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