Introduction
Hello. My name is Totto, and I have recently started to find electricity interesting.
In response to your previous question about how to connect digital ICs of different voltage levels: ・・・・
I : "How can I connect FPGA output buffers with different voltage levels? Open Drain to connect the output to a high impedance state of the FPGA output buffer and pull it up. state of the FPGA output buffer and pull it up to meet the input threshold regardless of the output voltage."I told him,
Senior : "You are correct about the meaning of the high impedance output, but 50 points ! ”
Senior : “This will exceed the Absolute Maximum of Cyclone ® IV. What happens to the device if the Absolute Maximum is exceeded? ”
I: "It will damage the device."
I was thinking about how to connect digital ICs of different voltage levels...
Senior :"Try Open Drain."
I: " Open Drain I see! Add a transistor to the board. Open Drain I : "Open Drain...I see! Open Drain
Open Drain with a transistor on the board
By the way, the current flow is...
Put a transistor on the board Open Drain By using a transistor on the substrate as an open drain, the device can be connected to digital ICs of different voltage levels without damaging the device.
I see, so I am impressed that the VIH needs to be in a high impedance state is necessary, I wondered what to do with a low VIH interface. I wondered what to do when the VIH interface is low, so I looked into it.
When the VIH is low on an interface, you can find the following information at ・・・・
Select the level of VOH in the I/O bank and lower the voltage level to meet the threshold.
I was relieved to know that I can now safely handle FPGAs when connecting digital ICs with different voltage levels.
Summary of this time
When the output voltage value of the FPGA is lower than the input voltage value of the general-purpose IC on the receiving side
Add a transistor to the board and raise the voltage level by Open Drain (output is high impedance) + pull up. Or, use a level shifter.
If the FPGA output voltage value is higher than the input voltage value of the receiving side
Lower the voltage level by selecting a standard from the I/O bank.
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