Hi, this is Poki.
I decided to add JTAG_UART to the "Qsys design that only has the function of blinking LED (so-called L-ticker) on Nios II" that Poki created before.
By adding JTAG_UART, it is possible to output characters and numbers from the FPGA to the PC via JTAG.
Design with JTAG_UART added
Generate HDL again for Qsys and changed the hardware design.
Then, we will add a new alt_putstr to the program to output characters to JTAG_UART.
alt_putstr("Start! \n");
However, when the above program was built, an error was output.
Error during Build
I found the cause of the error.
I realized the cause of the error: "The sopcinfo file was updated because I re-generated Qsys!
Because SBT creates BSP (Board Support Package) based on the sopcinfo file,
If the sopcinfo file is updated, the BSP and the program will not be consistent.
The sopcinfo file is responsible for passing the Qsys system configuration to the Nios II Software Build Tools for Eclipse ( SBT ) software development environment.
The inconsistency means that you have to re-create your software project with the updated sopcinfo file,
"Does the inconsistency mean I have to re-create the software project again with the updated sopcinfo file?
That's a bit of a hassle, since we have to re-configure the BSP, etc."
Only! There was no need to do that!
There is a way to use the software project you have already created!
How do I do it?
Update existing BSPs when sopcinfo is updated to reflect the changes in the Qsys design,
existing software project!
To update, simply right-click on the BSP folder and click on Nios II → Generate BSP.
Generate BSP
By clicking Generate BSP, you can regenerate the BSP to reflect the changes in the sopcinfo file.
Check the system.h file to see if the changes have been properly reflected.
The header file system.h in the BSP folder is generated based on the
It is a macro definition file generated from the sopcinfo file, which contains the address values of the peripherals.
Looking at the contents of this file, we can see that jtag_uart has been added, which was not present in the sopcinfo file.
JTAG_UART part of system.h
In addition, when a program change is required, such as adding a peripheral and writing a new process in Qsys, as in this case, the data to be stored in on-chip RAM should also be added,
The data to be stored in the on-chip RAM will also be changed.
After that, you need to fully compile the program after mem_init_generate as described in the previous issue.
( Please refer to this content. )
After compilation, you will have a sof file with updated initial values for on-chip RAM.
Write this sof file, launch the console with nios2-terminal on the Nios II Command Shell, and see...
JTAG_UART output
You can see that Start! is output according to the program part I just wrote.
Now, when you change Qsys, you do not have to rebuild the software project.
software can be started with a single configuration without having to recreate the software project when Qsys is changed!
Last but not least
Here is a brief description of the MAX 10 Evaluation Kit used in this work.
Size of the MAX 10 Evaluation Kit (approx. 7.5 cm)
Until now, the MAX series was not equipped with a RAM block, so it was not possible to install the Nios II.
However, the MAX 10 now has a RAM block and can be equipped with Nios II, and since it has built-in Flash Memory, it does not require an external Configuration ROM,
The MAX 10 has a built-in Flash Memory, eliminating the need for an external Configuration ROM!
Furthermore, it has an ADC function!
The MAX 10 is available as an FPGA with built-in Flash Memory.
It also includes Enpirion, a power supply with a built-in inductor that offers high efficiency and a small footprint!
This is also a product of Altera!
As you can see from the ruler sample we were measuring earlier, it is very small, isn't it?
As a recommended power supply for FPGAs, Enpirion's small size is a great solution for board space reduction!
Enpirion implemented in the MAX 10 Evaluation Kit
Why not try Nios II with the MAX 10 Evaluation Kit?
I am looking forward to using this board to the fullest!