Hello, this is Masuo.
In my previous column "Masuo's FPGA Board Fabrication 1", I found that the overshoot of the clock signal exceeded the absolute maximum rated voltage value.
After consulting with a senior employee, I was advised that the overshoot could be suppressed by installing a damping resistor.
What is overshoot?
Overshoot is a disturbance of the waveform that protrudes upward at the rising edge of a square wave.
(A waveform disturbance that protrudes downward is called undershoot.)
Overshoot is caused by signal reflection or noise signal overlap ( Figure 1 ).
Figure 1. Causes of Overshoot
Overshoot Removal with Damping Resistors
When overshoot becomes very large, it can destroy the device receiving the signal, cause latch-up phenomenon, and reduce the reliability of the device, so it must be properly taken care of.
Overshoot can be suppressed by connecting a resistor (called a damping resistor) in series on the signal line.
I learned from my senior colleague that it is appropriate to place the damping resistor near the output pin (Figure 2).
Figure 2: Position of the damping resistor
The value of the damping resistor can be obtained by the following equation
The damping resistor value that attenuates an overshoot voltage of 4.3 V to 3.3 V (attenuation ratio a = 20 %) can be obtained as R = 33 Ω from (Equation 1).
In reality, a 30 Ω resistor was installed.
Figure 3a and 3b show the clock signal waveforms before and after installing the damping resistor.
Figure 3a: Clock waveform without damping resistor Figure 3b: Clock waveform with damping resistor
By placing the damping resistor 30 Ω near the oscillator, we were able to suppress the overshoot voltage of the clock signal to 3.9 V.
What we learned
Overshoot can damage the device receiving the signal, cause latch-up, and reduce device reliability.
Overshoot can be suppressed by connecting a damping resistor in series at the near end of the signal line.
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