Hello, my name is Altera Hanako.
I am Altera Hanako, technical support for Altera® FPGA products at Macnica.
If you are a hardware engineer or a system engineer in this day and age, you have probably heard of FPGA semiconductor devices at least once. Although FPGAs are so familiar to us, there are always "first-timers" for any product. I'm going to start using FPGAs from now on! Those who are "just starting out with FPGAs" need to study, learn, and research information about FPGAs.
What is an FPGA? I will not write about the general basics of FPGAs here! A web search for "what is FPGA" will provide you with a lot of information nowadays. So I will leave the general basic knowledge to you.... Here, I would like to provide a bit more casual information.
(However, I will write this just in case...)
FPGA, in a nutshell, is "a logic device whose circuitry can be rewritten at a later time.
The origin of the word FPGA is an acronym for Field Programmable Gate Array, which stands for field [field], rewritable [programmable FPGA stands for Field Programmable Gate Array, a rewritable [programmable], LSI [semi-custom LSI with a grid of logic gates (Gate)].
Incidentally,
CPLDs are non-volatile ICs derived from the term Complex Programmable Logic Device.
Both are attractive because they are "programmable".
How big are the devices?
In a word, they are pin-sharp. With such a wide variety in the lineup, developers can purchase devices of the appropriate size (capacity) and keep their budgets low.
Before I give specific numbers for device scale, let me talk a little about the units used to express scale.
FPGAs have a unit that represents the device scale (capacity), and users use this unit as a guide when selecting devices. This unit is not standardized among manufacturers. For example, Altera® FPGAs use the term logic element (LE), while Xilinx uses the term logic cell (LC), and lattice is the number of look-up tables (LUTs). A LUT, by the way, is the core of a logic block in an LE or LC. (For more information, please search on the web. You can find a lot of information.)
The basic principle of LUTs is the same among FPGA manufacturers, but the number of LEs and LCs are not equal because the detailed structure differs slightly.
Now, let's go back.
Altera® FPGAs have 40 LEs in the smallest and 5,510K in the largest (as of October 2015). If we convert these LEs into ASIC gates, each LE is about 12 gates.
So
5,510 KLE x about 12 = 66,120K gate equivalent
can be estimated.
But actually, this is not the scale of logic circuits that FPGAs can realize! Nowadays, FPGAs contain a wide variety of blocks besides LE, such as DSP (multiplier) blocks, memory, PLLs, transceivers, ARMs, etc., so it is difficult to simply convert to gates. As a minimum, I think it is best to estimate the number of LEs and the number of 18x18-bit maximum multipliers combined.
The 5,510K LE FPGA we just used as an example has 3,960 18x18-bit multipliers.
18x18-bit multipliers are converted as about 5,000 gates.
3,960 x about 5,000 = 19,800K gate equivalent
LE is about 66,120K gates, so convert this FPGA model number in ASIC gates,
66,120K + 19,800K = 85,920K gates
In addition, internal memory, PLLs, transceivers, etc. are mounted as dedicated blocks, so
is equivalent to 85,920K gates + α.
is equivalent to 85,920K gates + α.
Internal memory (except for MAX® II and MAX® V) ranges from a minimum of 108K bits to a maximum of 1,677,312 bits.
User I/O pins range from a minimum of 27 pins (in 36-pin VBGA packages) to a maximum of 1,640 pins (in 2,912-pin FBGA packages).
The lineup varies by FPGA series, so check the manufacturers' handbooks, so-called data sheets. (These are current as of October 2015. Subject to change with respect to pre-release product information.)
When actually designing a circuit, it is almost impossible to use 100% of the capacity (resources) of the target device. If all blocks are used at full capacity, the wiring between each block will be congested, making it impossible to achieve the desired device speed or, worse, to place and route the device. Also, if unused resources are not available, it will be difficult to respond to circuit (specification) changes. To ensure flexibility, it is recommended to select a logic circuit with a capacity that will reduce the utilization of device capacity (resources) to 80% or less.
[Related article] Product Specifications: Altera® FPGAs
What is the operating speed?
The operating speed inside the FPGA should be around 200MHz if the resources used by the logic circuits are kept below 80% and the clock control method for transferring data inside the FPGA is synchronous (i.e., flip-flops operate with the same clock). (This depends on the FPGA product line.) Of course, it depends on the user's circuit design. Of course, it depends on how the user's circuit is built, so it may not even be able to achieve 100MHz. In other words, the internal operating speed of an FPGA depends on the user's logic circuit design configuration.
Software designers may feel that 200MHz is too slow, but FPGAs are hardware, so parallel processing is a breeze! Also, since the hardware part can be freely created, throughput can be further increased by devising the way data is processed.
The FPGA's external operating speed is supported by a wide variety of I/O standards, including DDR3/DDR4 SDRAM, PCI Express (PCIe), Serial RapidIO, Gigabit Ethernet, and many other interfaces, as well as internal transceiver blocks. The latest FPGAs support up to 28Gb/s. The latest FPGAs can achieve data transfers of up to 28 Gbps. (This information is current as of October 2015. Information on pre-release product information is subject to change).
How much does it cost to develop?
To develop FPGAs and CPLDs, the costs are roughly for the following items.
| Development costs | For FPGAs and CPLDs |
| Labor costs for design and verification | ⇒ If you develop FPGAs and CPLDs in-house, you can save on labor costs. |
| Development environment (software) | ⇒ 0 yen if you use Quartus® Prime Lite Edition! |
| Devices | ⇒ Inexpensive devices can be purchased for as low as 100 yen per piece. |
| Mask and wafer manufacturing costs | ⇒ Not necessary. |
| Board design and device mounting | ⇒ Costs vary depending on the board specifications and whether to outsource or do it in-house. |
| Writing data | ⇒ You write the data by yourself. In other words, the cost of writing data is 0 yen. However, if you do not have an Altera® FPGA download cable for writing, you will need to purchase one. |
| Change the design of logic circuits | ⇒ You can make changes immediately on the spot (if you are designing it yourself). （No additional cost will be incurred (since it is your own work). |
[Supplemental information on writing data]
FPGA is written with the FPGA mounted on the board. FPGA has dedicated pins for writing, and you should wire the dedicated pins to the connectors you have prepared on the board. Connecting the PC to the board (connector) is a special download cable called USB-Blaster™ II (USB-Blaster II). From the PC, use the Quartus® Prime programming utility (Programmer) to transfer and write data from the PC to the FPGA on the board. But the FPGA is an SRAM. In order to commercialize the product, non-volatile memory (dedicated ROM or flash memory) is also required to store the FPGA data on the board.
What is the minimum purchase unit?
The minimum purchase unit is 1 piece!
Therefore, they can be used for either prototyping or mass production, whichever suits the user.
Recommended contents
Getting Started with Altera® FPGAs