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FPGA I/O Functions -Open Drain ? Open Collector ? Tri-State ? -

FPGA I/O Functions -Open Drain ? Open Collector ? Tri-State ? -

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Hello, my name is Totto and my immediate goal is to be able to safely handle
FPGAs.

 

In the last issue, I looked at Current Strength, an optional function of the IOE output buffer built into Altera FPGAs.
I am ashamed that I was satisfied with the Current Strength function... I am ashamed of myself...
This time I looked into the Open Drain FPGA output buffer.

 

As a new engineer, when I first saw the term "Open Drain," I thought ・・・・・?
So, I tried to find out what Open Drain is.

 

What is Open Drain?

The drain of a FET transistor is the output that is pulled out without any connection in the circuit.

Nothing is connected in the circuit... This is the “open” that I learned in the training course!　I was a little pleased with my growth, and I thought to myself, “Open Drain.... I see, it means that the drain of the FET transistor is open! I thought that when the FET transistor is open, the voltage is not stable, so the transistor becomes high impedance. I made a hypothesis that the voltage is not stable when the FET transistor is open and examined the circuit.

Operation of Open Drain

When a low signal is input to IN, the drain becomes open, so OUT becomes high impedance, and when a high signal is input to IN, OUT becomes low.

When I was satisfied that I understood the meaning of "open," a senior asked me, "What is the difference between Open Drain, Open Collector, and Tri-State? I looked it up.

 fig1.png

 

 

What is Open Collector?

Open Drain is to open the drain of a FET transistor, while Open Collector is to open the collector of a bipolar transistor.

Open Collector Operation

The collector of the bipolar transistor is opened and the output is in a high impedance state.

 2.png

 

 

What is Tri-State?

Tri-State combines multiple transistors and controls their high impedance with an EN signal.
The figure shows a combination of FET transistors.

Tri-State Operation

  • When EN is Low (red frame in the table)
    • The EN transistor in the circuit is ON.
    • The signal input at IN is output as it is.

  • When EN is High (blue box in the table)
    • The EN transistor in the circuit is OFF.
    • Since OUT is open, the output is in a high impedance state.

3.png

 

Comparing the two truth tables

4.png

You can see that the output is high impedance only when OUT is open.
Tri-State controls the high impedance by the EN signal.

 

Here I have a question.
What is high impedance used for, anyway?

 

Summary of this article

  • Open Drain means that the drain of the FET transistor is open and the output is high impedance.
  • Open Collector means that the collector of a bipolar transistor is open and the output is in a high impedance state.
  • Tri-State controls the high impedance with the EN signal.

 

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