When designing a board that implements an FPGA, you may examine the power consumption of each device including the FPGA.
As mentioned in " Types of FPGA Power Consumption and Calculation Methods ", FPGA power consumption is composed of static + dynamic + I/O and also depends on the design (logic circuit).
Altera provides FPGA users with two estimation tools:
Early Power Estimator (EPE) and Altera FPGA Power and Thermal Calculator (PTC)
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In this article, we will give an overview of the EPE and PTC and briefly explain the operation flow for estimation.
Overview of EPE and Altera FPGA PTC
EPE and Altera FPGA PTC are used to estimate power consumption relatively early in the design process.
Once the design is complete, it is recommended that it be analyzed with Quartus® Prime's Power Analyzer.
EPE and Altera PTC can be used in different ways depending on the FPGA being developed, as shown in the table below.
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Early Power Estimator (EPE) |
Altera FPGA Power and Thermal Calculator (PTC) |
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Target FPGAs
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Stratix® Series (excluding Stratix® 10) Arria® Series Cyclone® Series MAX® 10, MAX® V, MAX® II
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Agilex FPGA Series Startix® 10 FPGAs |
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Tools to Use
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Get the spreadsheet from the manufacturer's web page |
Use features integrated into Quartus® Prime Pro Edition Or Download & install a standalone Altera FPGA PTC |
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What information do you need to enter? |
Resource usage (or estimated number if design is not yet complete) Input clock requirements and toggle rate Environmental conditions, etc.
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Quartus® Prime Compilation information Required to reflect Quartus Prime compile information File Format |
.csv |
.qptc |
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Operation Flow |
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How to get
Obtaining the EPE
EPEs are available from the Altera FPGA website Early Power Estimator (EPE) and Power Analyzer.
An EPE user guide is also available.
Obtaining the Altera FPGA PTC
Altera FPGA PTC is a standard feature of Quartus® Prime Pro Edition and can be used by launching the GUI from the Tools menu if Quartus® Prime Pro Edition is installed.
Alternatively, the Altera FPGA PTC can be used in a standalone mode. To do so, download and install the software from the FPGA Software Download Center.
The user guide is available at the following link
EPE Operation Flow
The resource information entered into the EPE is handled differently depending on how complete the FPGA design is, as shown in the overview figure.
If the design is not yet complete ➡ User Input
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1 User manually enters resource information into EPE |
2 User manually enters environmental conditions into EPE |
3 User confirms estimation results |
Recommendation!
If the design is complete & ready to compile ➡ Quartus Prime Design Profile
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1 With Quartus® Prime Compile Execution |
2 Generate csv file with Quartus® Prime Generate csv file |
3 Import .csv into EPE |
4 Review Estimate Results |
EPE : User Input
1. user manually enters resource information into EPE
After opening the downloaded EPE, a spreadsheet will appear as shown below.
Early Power Estimator for Arria® 10
The spreadsheet has tabs at the bottom for the user to manually enter the resource information assumed for the FPGA in each of the tabs. (The items on the tabs vary depending on the target FPGA.)
- Logic : Logic
- PLL : PLL (Phase-Lock-Loop circuit)
- HPS: Hard Processor System (SoC)
- RAM: Internal memory
- IO: I/O
- DSP : DSP block
- IO-IP : I/O interface IP
- Clock : Clock
- XCVR : Transceiver
For more information, please refer to the comments in the tooltip that appears in the appropriate cell in the spreadsheet, or refer to the Early Power Estimator User Guide for each family.
2. user manual input of environmental conditions into EPE
Specify the environmental conditions in the Input Parameters area of the Main tab.
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Family
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Select device family
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Junction Temp, TJ
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Select whether the junction temperature ( TJ ) is automatically calculated or entered by the user
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Device
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Select device model number
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Ambient Temp, TA
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Enter the temperature of the atmosphere that cools the device
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Device Grade
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Select the combination of operating temperature, speed grade, and power options to be used
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Cooling Solution
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Select the relevant airflow cooling solution
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Package
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Select the device package
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ΘJA Junction-Ambient
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Enter Junction-Ambient value
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Transceiver Grade
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Select standard or theoretical worst case silicon process
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Board Thermal Model
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Select the board type used for thermal analysis
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Power Characteristics
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Select Typical or Maximum
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ΘJB Junction-Board
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Enter Junction-Board value
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VCC Voltage
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Select the VCC power rail for the device
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Board Temp, TB
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Enter the board temperature to be used for thermal calculations when entering a custom or standard Board Thermal Model
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Power Model Status
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Indicates whether the device's power model is in reserve or final status.
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* Item contents vary by device family.
* For items not listed in the table above, move the pointer over the appropriate item cell in the spreadsheet and refer to the comments in the tooltip that appears. 3.
3. Confirmation of Estimated Result
In the Thermal Power and Thermal Analysis areas of the Main tab, you can see the results of the estimates calculated from the conditions you entered.
[Notes] These calculations are not specifications. These calculations are not specifications and should be used as "estimates" of power consumption.
The Thermal Power area shows the estimated power consumed in the device.
Total Power is the sum of the thermal power of all resources used by the device, including the maximum power from standby and dynamic power.
[Notes] Total thermal power includes only the thermal components of the I/O section and does not include thermal power consumed externally, such as reference voltage terminators.
The Thermal Analysis area shows values for junction temperature (TJ), total thermal resistance from junction to ambient (θJA), and maximum allowable ambient temperature (TA).
This is the user-input operation flow of the EPE.
EPE: Quartus Prime Design Profile
1. compile and run with Quartus® Prime
Once the project design and constraint settings are complete, compile the project to completion.
Processing menu ⇒ Start Compilation
2. Generate csv file in Quartus® Prime
Generate a CSV file for EPE based on the environment set in the compiled project design and the compilation results.
Project menu ⇒ Generate PowerPlay Early Power Estimator File
(File name: *_early_pwr.csv)
Generate CSV file
3. Import the .csv file into EPE
Import the *_early_pwr.csv file generated by Quartus® Prime into EPE.
Import CSV file
4. Check the Estimation Result
On the Main tab, in the Thermal Power and Thermal Analysis area, you will see the results of the estimates calculated from the conditions entered by the user.
[Notes] These calculations are not specifications. These calculations are not specifications and should be used as "estimates" of power consumption.
The Thermal Power area shows the estimated power consumed in the device.
Total Power is the sum of the thermal power of all resources used by the device, including the maximum power from standby and dynamic power.
[Notes] Total thermal power includes only the thermal components of the I/O section and does not include thermal power consumed externally, such as reference voltage terminators.
The Thermal Analysis area shows values for junction temperature (TJ), total thermal resistance from junction to ambient (θJA), and maximum allowable ambient temperature (TA).
This is the operational flow through the Quartus Prime design profile in EPE.
Altera FPGA PTC Operation Flow
Launch the "Power and Thermal Calculator" from the Tools menu in Quartus® Prime Pro Edition and you will see the GUI as shown below.
Power and Thermal Calculator for Agilex® 7
As shown in the overview figure, the resource information to be input to PTC is handled differently depending on how complete the FPGA design is.
If the design is not yet complete ➡ User Input
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1 Resource information is manually entered into PTC by the user. |
2 User manually enters environmental conditions into PTC |
3 Review Estimated Results |
Recommendation!
Design is complete & ready to compile ➡ Quartus Prime Design Profile
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1 With Quartus® Prime Compile Execution |
2 Generate QPTC file with Quartus® Prime Generate QPTC file |
3 Import .qptc into PTC |
4 Review quote results |
PTC : User Input
1. user manually enters resource information into PTC
Power and Thermal Calculator for Agilex® 7
In the Resource Summary/Navigation window, select each item from Total Dynamic Power in Resource Type, and manually enter the expected resource information for the FPGA. (The items on the tabs vary depending on the target FPGA.)
- Clock : Clock
- Crypto : Crypto block
- DSP : DSP block
- HBM : High Bandwidth Memory
- HPS : Hard Processor System (SoC)
- IO : I/O
- Logic : Logic
- NOC: Memory Network on Chip
- PLL : PLL (Phase-Lock-Loop circuit)
- RAM : Internal memory
- Transceiver
Refer to the FPGA Power and Thermal Calculator User Guide for details.
2. user manually enters environmental conditions into PTC
Select "Main" from Resource Type in the Resource Summary/Navigation window and specify the environmental conditions.
PTC: Main (in Resource Type) for Agilex® 7
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Family
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The device family selected at PTC startup is displayed. (If PTC is started after the project is set, it will be set automatically.) |
Calculation mode
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Calculation mode Specifies the calculation mode of the thermal analysis solver to be used.
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Device
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Select device model number
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Junction temperature, TJ (°C)
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Specify junction temperatures for all dies in the package
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Device Grade
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Select the combination of operating temperature, speed grade, and power options to use
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Package
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Select device package
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Power characteristics
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Select Typical or Maximum
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VCC Voltage (mV)
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Only PTC of Stratix 10 is displayed. |
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* Item contents vary by device family.
* Please refer to FPGA Power and Thermal Calculator User Guide for details.
3. Confirm the Estimated Result
In the Resource Summary/Navigation window, the calculated power consumption for each resource is displayed in Resource Type.
The Report section displays the current per power rail as calculated by PTC.
PTC: Report (in Resource Type) for Agilex® 7
The above is the user-input operation flow of PTC.
PTC: Quartus Prime Design Profile
1. compile and run with Quartus® Prime Pro Edition
Once the project design and constraint settings are complete, compile the project to completion.
Processing menu ⇒ Start Compilation
2. Generate QPTC file in Quartus® Prime Pro Edition
Running Power Analyzer on Quartus® Prime Pro Edition will generate a QPTC file for PTC based on the environment set in the compiled project design and the compilation results.
Processing menu ⇒ Start ⇒ Start Power Analyzer
(File name: <project_revision_name>.qptc)
3. Import .qptc to PTC
When PTC is started with the project open, the window shown below will appear, and clicking the OK button will automatically import the .qptc in the project.
You can also import a .qptc file by selecting it from the File menu ⇒ Open in PTC.
4. Checking the Estimated Result
In the Resource Summary/Navigation window, the calculated power consumption for each resource is displayed in Resource Type.
The Report section displays the current per power rail calculated by PTC.
This is the operation flow of the Quartus Prime design profile in PTC.
Summary
EPE and PTC results are rough estimates of FPGA power consumption and thermal characteristics, and are not exact specifications of actual power consumption during device operation. Also, input information is critical in estimating power consumption, as input factors (resource, toggle rate, temperature, etc.) can greatly affect the results.
Both EPE and PTC can be easily estimated using the Quartus® Prime design profile method, but once you are ready to compile your design, switch to Quartus® Prime's Power Analyzer to get more accurate power analysis results. Actual power consumption is a function of device and design input.
Since actual power consumption is affected by the device and design input signals, be sure to verify actual power consumption while the device is operating.