Hello, this is Masuo.
I will be writing a series of articles titled "Masuo's FPGA Board Making," in which I describe a red-faced episode when I designed an FPGA board to implement a clock function as part of my training for newcomers to the company!
Please watch warmly as the newcomer makes his "mistake" (lol).
The cost of exceeding the absolute maximum voltage rating...
One day, Tot's FPGA suddenly stopped working.
The three of us stared at the broken FPGA in dismay...
(Click here for a photo of the broken FPGA )
The cause was that we applied a voltage value (5.5 V) to the FPGA that exceeded the absolute maximum rated voltage value (4.2 V).
Tot - "Why was it working fine earlier!"
Senior employee "For example, if a car with a maximum speed of 120 km/h continues to run at 200 km/h, the engine will break down.
FPGAs are the same, they will break down if they continue to run above their absolute maximum rated voltage.
About Absolute Maximum Ratings
The absolute maximum ratings are defined for FPGAs, including the maximum values of supply voltage and input signal voltage (Table 1-1).
Absolute maximum ratings are the limits at which a device can withstand breakdown.
Therefore, exceeding the absolute maximum ratings may cause fatal damage to the device.
This value varies for each device family.
The device used by Mass Man is a Cyclone® IV E.
The output signal voltage of the oscillator is 5.5 V, and the 5.5 V clock signal was input to the FPGA.
In fact, the mass man was using the same oscillator as Tot's, and his FPGA was also in danger of being damaged!
Recommended Operating Conditions
Recommended operating conditions are defined for FPGAs, including recommended values for power supply voltage and input signal voltage (Table 1-3).
When designing the power supply, Massei checked Table 1-3.
The power supply voltage to the FPGA was designed to be the recommended value (Typ).
However, he neglected to check the input signal voltage to the FPGA and purchased an oscillator with a 5.5 V specification...
Overshoot
After the FPGA was damaged, I changed to an oscillator with an output signal voltage of 3.3 V specification.
This time, I observed the clock signal with an oscilloscope to see if the recommended input signal voltage (3.6 V) was properly met.
The image below shows the clock signal observed by placing a probe on the FPGA input pin (Figure 1).
As a result of the observation, an overshoot was observed.
The overshoot portion (overlap of noise and signal reflection) exceeded the absolute maximum rating of 3.6 V.
The mass man could not come up with a countermeasure other than changing the oscillator.
He discussed this fact with a senior employee.
Masuo: "The overshoot exceeded the absolute maximum rating. What should I do?"
Senior employee - "Why don't you install a damping resistor?"
(continued...)
What we learned
- Never exceed the absolute maximum ratings as it will cause serious damage to the FPGA
- Design the FPGA board to meet the recommended operating condition voltage values
In fact, it was already too late, and I realized afterwards that the mass man's FPGA device had already been severely damaged.