Introduction
Hello, my name is Taro Washimiya, and I am a technical support engineer for Altera® FPGA products.
By the way, how do you determine the power consumption of an FPGA when designing a board that implements an FPGA?
To determine FPGA power consumption, you need to know that FPGA power consumption is determined by the following major factors.
- Standby (static) power consumption
- Operating (dynamic) power consumption
- I/O power consumption
Then, let's look at how power consumption can be determined, one by one, step by step.
Three types of power consumption
Standby (static) power consumption
The standby (static) power consumption of a device due to leakage current is said to depend on the following factors
- Die size
- Temperature
- Process variation
In general, static power consumption is independent of resource utilization. It can be estimated prior to detailed device characterization (debugging and other actual device evaluations) and can be defined in two ways: standard power consumption and maximum power consumption.
Operating (dynamic) power consumption
First, power is required to charge and discharge the internal capacitors of the logic array and the internal connection network. Power is consumed within the device when logic levels change, such as 0 → 1 or 1 → 0 at internal nodes.
Power consumption during core operation includes both routing power and power consumption of logic elements (the smallest units of logic resources that make up combinational, sequential, and other circuits). Logic element power is consumed by charging and discharging internal node capacitors and also from internal resistor elements. Routing power consumption results from the current required to charge and discharge the external routing capacitors driven by each logic element.
I/O Power Consumption
I/O power is consumed by the following factors
- Output pins of the device
- Output driver circuitry operating in resistive mode
- Charging and discharging of external load capacitors connected to the external termination network (if present)
Power Estimation Methodology & Analysis Tools
Now that we know the key factors that determine power consumption, how do we determine the power value to be consumed?
Altera provides tools for Altera® FPGA users to estimate and analyze power consumption.
Power Estimation & Analysis Tools
PowerPlay Early Power Estimator (EPE)
An Excel-based power estimation tool. Two methods are available: User Input, in which FPGA resources are manually input for estimation, and Quartus® Prime Design Profile, in which a CSV file with resource information extracted from a Quartus® Prime project in design (circuit design) is generated and easily imported into EPE. There are two ways to use Quartus® Prime Design Profile.
This method is often used for estimating at a relatively early stage in the design process.
Click here to read an article describing how to estimate with EPE.
PowerPlay Power Analyzer (PPPA)
Allows you to analyze power consumption based on Quartus® Prime. Place-and-Route Results, which estimates power based on the toggle rate set from Quartus® Prime's PowerPlay Power Analyzer without performing a function simulation, and Place-and-Route Results, which estimates power based on the waveforms from the function simulation results, are available in Quartus® Prime. Simulation Results are generated from function simulation results and imported into PowerPlay Power Analyzer for estimation.
Power Characteristics
The basic power consumption characteristics of FPGAs can be visualized as shown in the figure below. After power-on (Power-Up), the FPGA enters a static state, and once the FPGA configuration is complete and it starts running, the power consumption becomes the power consumption during operation (dynamic + I/O + static).
Basic Power Consumption Characteristics of FPGAs
A more in-depth article explaining how to estimate power consumption by EPE is now available. Also, an article explaining the relationship between junction temperature and ambient temperature is available for your reference.