This is an updated version of the former title "Techniques for using DS-5 - Flash Programming Alternative".
Arm® DS-5 for Intel® SoC FPGA Edition (DS-5) has been replaced by Arm® Development Studio for Intel® SoC FPGA Edition (Arm® DS), the standard software integrated development environment for Intel® SoC FPGAs. Arm® DS is the successor to DS-5 and is not significantly different in usability. Most of the articles in this series are applicable to both Arm® DS and DS-5, but the differences are clearly noted in this update.
***
This article provides additional information on how to use Arm® DS / DS-5, which is available as a software integrated development environment for Intel® SoC FPGAs.
This article introduces the " Arria 10 Flash Programming Alternative," a method for writing to Flash for HPS boot that can be found on RocketBoards.org.
Note: The scripts on Rocketboards.org are for the DS-5; some modifications are required to make them work on the Arm® DS.
A modified version of the script for Arm® DS is attached to this article as a reference. The scripts are for reference only and should be used at your own risk. (The conditions for redistribution and use are also listed at the top of the script.)
Introduction
The method described in this article does not directly manipulate the Arm® DS / DS-5 debugger; it is designed to run the Arm® DS / DS-5 via a Python script, making it ideal for users unfamiliar with debugger operation to write in Flash using the Arm® DS / DS-5. This is the best method for users who are not familiar with debugger operation to write to Flash using Arm® DS / DS-5.
U-Boot's command functions have the advantages of "faster writing" and "more supported Flash devices" compared to the HPS Flash Programmer (the Flash writing tool included with SoC EDS). Flash devices" compared to the HPS Flash Programmer (the Flash writing tool included with the SoC EDS), are also advantages of using this method.
See also the following article on Flash writing with U-Boot:
Faster than HPS Flash Programmer! How to write to QSPI with U-Boot (in Japanese)
Original page (RocketBoards.org)
URL of the original page:
https://rocketboards.org/foswiki/Documentation/Arria10NANDFlashProgramming
Please refer to the original page for more detailed information.
Figure 1. Top screen of the original page (taken from RocketBoards.org)
The original article is intended for older versions of the tool environment.
If you are using the latest development tool environment, please refer to Rocketboards.org " SoCEDS and ARM Development Studio " and perform the following items.
- Installation
- Running the Tools
- SoC EDS Licensing
Note: For Windows, you will need to install Cygwin separately.
When we checked here, we compared the Cygwin environment with that included with the previous version (v18.1) of SoC EDS, and responded by installing the following additional package. 'python2,bcrypt,ccrypt,libprocps8,tcsh'.
Preparation 1: Downloading scripts, etc.
Download the archive (flash_programmer.tgz) containing the script
Download the script " flash_programmer.tgz " published on the original page.
Extract the file on your PC
Extract the "flash_programmer.tgz" file on the host PC on which SoC EDS is installed. 1.
Start Embedded Command Shell. 2.
Execute the TAR expansion command on the Shell.
$ tar -xzvf ./flash_programmer.tgz
Move to the destination directory.
$ cd flash_programmer
The following figure shows the configuration of the directory after the archive has been extracted.
Figure 2. Configuration after archive expansion
The main script for writing Flash is flash_programmer.py.
Other design files for the Arria® 10 SoC Development Kit are provided for each boot source (NAND / QSPI / SDMMC) and board revision (Rev.B / Rev.C).
Each design includes the following three files
- \output_files\ghrd_10as066n2.sof ... FPGA configuration data (.sof)
- \software\bootloader_extcfg_semihosting\devicetree.dtb ... Device tree binary for U-Boot (.dtb)
- \software\bootloader_extcfg_semihosting\uboot-socfpga\u-boot ... U-Boot itself (executable file)
The standard design file is only for Arria® 10 SoC Development Kit, but the same mechanism can be applied to various target boards by preparing design files with the same configuration.
According to the information on the original page, only the Arria® 10 SoC is supported. However, as far as we can see from the script, there are some descriptions to support Arria® V SoC and Cyclone® V SoC other than Arria® 10 SoC, so it is possible that Arria® V SoC and Cyclone® V So it may be possible to support Arria® V SoC and Cyclone® V SoC by modifying the script. Please check the contents and operation of flash_programmer.py before use.
In case of Arm® DS, download and unzip flash_programmer_armds.zip attached to this article, and replace flash_programmer.py with it.
Preparation 2: Prepare design files for the original target (optional)
Preparation of design directory (naming rules)
Prepare a design directory for storing design files for the original target directly under flash_programmer.
Naming rule: <device>_<bootsource>_<board_name>_design
- <device> = Select from {a10 / av / cv}.
- <bootsource> = selected from {qspi / sdmmc / nand}
- <board_name> = Specify an easy-to-recognize name for board identification
Example (Arria® 10, QSPI boot, board name: testboard01): a10_qspi_testboard01_design
Creating and storing design files
Store the following three files in the created design directory.
- \output_files\ghrd_10as066n2.sof ... FPGA configuration data (.sof)
- \software\bootloader_extcfg_semihosting\devicetree.dtb ... Device tree binary for U-Boot (.dtb)
- \software\bootloader_extcfg_semihosting\uboot-socfpga\u-boot ... U-Boot itself (executable file)
FPGA configuration data (.sof) is the file generated by the Quartus® project for the original target.
The following options must be specified for the U-Boot and device tree, so they must be created separately from the production version.
- External Configulation Enable ( check external_fpga_config on bsp-editor is ON )
- SemiHosting Enabled ( Edit the definition under the U-Boot source tree )
Before edit] #undef CONFIG_SEMIHOSTING
After editing] #define CONFIG_SEMIHOSTING
Flash Programming Execution
Connection with target board
Connect the target board to the host PC with USB-Blaster (JTAG) cable. (This is the only connection required.) #define CONFIG_SEMIHOSTING
Programming Execution
After powering on the target board, run flash_programmer.py on Embedded Command Shell. 1.
Launch Embedded Command Shell. 2.
Move to the directory where the script is to be extracted.
$ cd flash_programmer
Execute the script (e.g. Arria® 10, QSPI, board name: testboard01)
$ ./flash_programmer.py --board=testtarget01 --soc=a10 --flash=qspi --operation=epv --address=0x0 --size=0x100000 --file=uboot_w_dtb-mkpimage.bin
See RocketBoards.org for details on flash_programmer.py options.
(You can also find an acceleration procedure using TFTP, which is not covered in this article.)
Figure 3. flash_programmer.py options (taken from RocketBoards.org)
Execution Example
The following is an example of the console display during programming.
|
|
|
Execution example (3/5) |
|
Execution example (4/5) |
Execution Examples (5/5) |
Modified Script for Arm® DS
Please check the original flash_programmer.py and the attached file with the comparison tool.
The changes are as follows
Debugger command name changed: debugger -> armdbg
- JTAG connection name (CDB_ENTRY) changed: Altera -> Intel SoC FPGA
(Before) CDB_ENTRY = "Altera::Arria 10 SoC::Bare Metal Debug ...
(After change) CDB_ENTRY = "Intel SoC FPGA::Arria 10 SoC::Bare Metal Debug ...
Change reset command: reset system -> reset
Tip: For Arm® DS, the following Warning will appear after the write is complete (successful).
------
INFO : WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by org.python.netty.util.internal. PlatformDependent0 (file:/opt/arm/developmentstudio-2020.0/sw/ide/plugins/com.arm.tpip.jython_2.7.0.20200331_211023/lib/jython-2.7. 0-standalone.jar) to field java.nio.Buffer.address
WARNING: Please consider reporting this to the maintainers of org.python.netty.util.internal PlatformDependent0
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Jul 21, 2020 2:03:47 PM org.python.netty.util.internal.PlatformDependent <clinit>
INFO: Your platform does not provide a complete low-level API for accessing direct buffers reliably. Unless explicitly requested, heap buffers will always be Unless explicitly requested, heap buffer will always be preferred to avoid potential system unstability.
------
The above warning seems to be caused by the implementation of the jython-2.7.0-standalone.jar included in Arm® DS. The implementation method of the .jar seems to have been changed to a method that is not recommended in the recent Java environment.
Flash writing has succeeded, so if this warning is displayed, please ignore it and use the software.
Summary
In this article, we introduced a method of Flash programming using Arm® DS / DS-5 indirectly in python scripts.
Finally, the Arm® DS / DS-5 debugger GUI will not be activated by this method, but the Arm® DS / DS-5 license is required as usual. Please note that if you try to run this script on a PC without an Arm® DS / DS-5 license, a license error will occur and you will not be able to program.
Recommended Articles/Documents
How to Use the Debugger (Arm® DS / DS-5) for SoC FPGAs
Altera® SoC FPGA Summary Page
Development Flow for Altera® FPGAs