My name is Taro. This time, I would like to write about buffer products.
There are two main types of buffers: Fanout Buffers and Zero Delay Buffers (ZDBs).
A Fanout Buffer is a buffer that distributes the input signal without a PLL.
The ZDB is a buffer that has no delay between the input and output signals.
The biggest difference between these two buffers is whether or not they use an internal PLL.
A PLL synchronizes the phase (or frequency) of the reference (input) signal with the feedback signal.
The role of each PLL block is explained below.
PFD ( Phase Frequency Detector ) / CP ( Charge Pump )
Outputs an error signal so that the feedback signal is aligned in phase/frequency with the reference signal. Some PLLs use a PD (Phase Detector) to match only the phase as an alternative to the PFD. The CP converts the error signal output from the PFD into a constant current.
LPF (Loop Filter)
LPF (Loop Filter): Smoothes the error signal from the PFD / CP and converts it to a control voltage for the VCO.
VCO ( Voltage Controlled Oscillator )
Voltage controlled oscillator. The output frequency can be changed according to the input voltage.
Since this is a digression from the explanation of buffers, I will write more about PLLs in the next article.
In the ZDB, the delay between input and output is eliminated by delaying the feedback signal. In the figure below, for example, a delay of Y[sec] is assumed to be generated by the delay element.
The reference and feedback signals are synchronized by the PLL. When synchronizing, the output signal (VCO) is output Y[sec] earlier than the feedback signal because of the delay element.
Y[sec] earlier than the feedback signal. Therefore, the timing chart of each signal is shown in the figure below.
As shown above, the output signal timing can be freely shifted by setting the delay element Y[sec].
Therefore, if the gate delay of the device in the subsequent stage is equal to the delay time of the delay element, the delay can be eliminated.
This is the principle of ZDB.
So, is ZDB a better buffer than Fanout Buffer?
Not necessarily. The choice between ZDB and Fanout Buffer is case by case.
As explained above, ZDB has the advantage of adjusting the input/output timing, but it also has to adjust the frequency of the output signal accordingly, which inevitably generates Cycle-to-Cycle Jitter.
In addition, if the Jitter Gain peak of the internal PLL overlaps with the Jitter Gain peak of the PLL inside the upper/lower device, the Jitter generated will increase. Therefore, care must be taken to shift the upper and lower gain peaks during design.
On the other hand, the Fanout Buffer has the advantage of smaller output signal Jitter compared to the ZDB because there is no Jitter generation by the PLL.
...I have written at length, but the contents of this column can be summarized as follows.
ZDB : Timing control of input/output is possible
Fanout Buffer : Does not generate extra Jitter on output signals
The choice of buffer is a case-by-case basis, but if you have any questions about buffers, please feel free to contact us.
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