In this 11th issue, we will discuss "Examples of Malfunctions Caused by Patterns in FPGA Power Supply Design and How to Resolve Them".
As you know, various problems can occur during power supply design.
In this issue, we will focus on cases caused by patterns. In particular, this article is likely to occur in products with a switching frequency of 1 MHz or higher. We hope that the following examples of faulty operation and their solutions will be useful for your future FPGA power supply design.
Case 1: Using electrolytic capacitors for input capacitors
Case 2: Using electrolytic capacitors for output capacitors
Case 3: Temperature and DC bias characteristics of ceramic capacitors
Case 4: Backside placement of output capacitor COUT
Case 5: Stretching VFB (feedback) nodes
Case 6: Location of decoupling capacitance of analog power supply
Case 7: Wrong constant of input filter
Case 1: Use of electrolytic capacitor for input capacitor
Symptom: Severe heat generation.
Cause: The input capacitor supplies switching current, so a high di/dt square wave current flows. In the case of high current output, the RMS ripple current of the electrolytic capacitor exceeds the allowable value, resulting in abnormal heat generation and affecting reliability.
Solution: Place a capacitor with low ESR, such as a ceramic capacitor, close to the device as an input capacitor.
Caution: A capacitor with high ESR causes large ripple; use a capacitor with low ESR.
Case 2: Use an electrolytic capacitor as an output capacitor
Symptom: Large output voltage ripple and excessive heat generation.
Cause: Electrolytic capacitors have a high ESR, resulting in a large output ripple voltage. Large ripple noise causes malfunction of the circuit connected to the load.
Solution: Place a capacitor with low ESR, such as a ceramic capacitor, close to the device as an output capacitor.
Caution: Capacitors with high ESR cause large ripple; use capacitors with low ESR.
Example 3: Temperature characteristics and DC bias characteristics of ceramic capacitors
Symptom: Output voltage drops or is unstable when temperature becomes high. Or it is not stable.
Cause: If the actual capacitance value under the operating conditions is not taken into account, an abnormal operation of the power circuit is caused due to insufficient filtering effect.
Remedy: Consider the capacitance decrease due to temperature or use a capacitor with good temperature characteristics.
Note: Select a capacitor with sufficient consideration for the increase or decrease in capacitance due to temperature characteristics.
Case 4: Output capacitor -Layout capacitor on the back side of COUT
Symptom: Output voltage is not stable. Heat generation is severe.
Cause: COUT is placed on the BOTTOM layer via VIA.
Countermeasure: Connect high switching current loops such as power MOSFETs, input and output capacitors in the same layer of TOP layer as short as possible.
Note: Strictly follow the connection pattern on the same layer where high switching current loops are generated.
Example 5: Stretching of VFB (feedback pin) node
Symptom: Noise other than switching frequency rides on the output voltage.
Cause: The line to the VFB pin after voltage division was long and the signal line was adjacent and affected.
Countermeasure: Shorten the wiring pattern to the VFB pin. Also, move the signal line away from the VFB terminal.
Note: Shorten the wiring pattern for high-impedance nodes such as the VFB node.
Case 6: Location of decoupling capacitance of analog power supply
Symptom: Operation is not stable. Heat is generated.
Cause: The VIA of the power supply source is located near the device of the analog power supply input terminal, and there is a capacitance outside of the VIA, so decoupling is not functioning.
Countermeasure: Place the device, capacitance, and power supply source VIA so that decoupling of the analog power input is performed near the device.
Note: Place the components in the correct order for decoupling and filtering to function.
Case 7: Wrong input filter constants
Symptom: Device does not work.
Cause: Depending on the device, an RC filter with a resistance of 1.0 to 20Ω and a capacitance of 1.0uF is connected to the VIN input in the recommended circuit. If 1kΩ is connected due to an incorrect resistance value, a voltage drop will occur due to the bias current on the VIN pin. The operation stops when UVLO of VIN is detected due to the input voltage drop.
Solution: Change the resistor value to the recommended one.
Note: Check the constants of the components used in the circuit.
By knowing the above examples, we hope you will be able to proceed with your future designs without stress.
Now, the next issue will finally be the final issue of FPGA, which we have introduced 11 times since January. We will introduce the 12th issue, "Summary of FPGA Power Supply Design Process".
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