Introduction
Sulfur is an ideal platform for both the development evaluation and production design phases, combining a production-quality SOM with Agilex™ 5 FPGAs E series and a carrier board with a wide range of interfaces. The Sulfur platform is ideal for both the development and evaluation phases of a product, as it allows for rapid development in an environment similar to that of a real system by connecting the devices that will be used to each interface, and after development and verification on Sulfur, the production-quality SOM can be seamlessly integrated into the customer's final product.
One of the features of Sulfur is its ability to evaluate a variety of cameras and image sensors, including MIPI CSI-2, SLVS-EC, and CameraLink. In addition, Sulfur is equipped with many other interfaces, eliminating the need to develop an entire new board for prototyping purposes and significantly reducing board development man-hours and board manufacturing costs during function development.
Sulfur can be used for any application that combines an Agilex™ 5 FPGAs E-series ARM processor with an FPGA fabric, from industrial applications such as machine vision and robot/motor controllers to applications such as AGV/AMR and service robots. It enables algorithm development, verification, and system enhancements for a wide range of today's applications, including slow mobility, object detection, video surveillance, and automated driver assistance.
Type-A Carrier Board
Board Appearance
Board Block Diagram
Product Specifications
SOM Specifications with Agilex™ 5 FPGAs E Series (with Sulfur)
Item | Details |
Device | A5ED065BB32AE5SR0 ( ES version ) ・Logic capacity: 656KLE ・Transceivers: 24 |
SOM size | 77㎜x118㎜ |
Processor | Arm Cortex-A55 core x 2 Arm Cortex-A76 core x 2 |
Memory | HPS : 32bit LPDDR4 4GB x 1 FPGA : 32bit LPDDR4 4GB x 2 |
Storage | eMMC : 32GB QSPI : 2Gbit (256MB) |
Board-to-Board Connectors | High-density connector from Samtec ・SOM side : ADF6-100-03.5-L-4-2-A-TR ・(Carrier side : ADM6-100-01.5-L-4-2-A-TR) |
Heat sink | (Option)Heat sink with active fan (Standard with Sulfur Development Kit) |
Other | Micro SD Card slot |
Sulfur Development Kit with SOM Specifications
Item | Details |
SOM | SOM with Agilex™ 5 FPGAs E Series |
Display Interface | HDMI 2.0 |
Camera Interface | MIPI CSI-2 4 Lane x2 & 2 Lane x2 CameraLink x2 SLVS-EC x1 CoaXPress (4 Lane) x1 |
Ethernet | HPS : 10/100/1000 Base-T x1 (RJ45) FPGA : 10/100/1000 Base-T x2 (RJ45), 10GbE x1 (SFP+) |
USB 3.1/2.0 | USB Type-A (Hub) High Speed/ Super Speed x4 ( *ES : HS only ) |
UART | USB Type-C (USB serial) |
PCIe interface | PCIe Gen3.0 x4 |
JTAG I/F | JTAG10 pin (can be connected to Intel R FPGA Download Cable II (sold separately)) |
Other | CAN x2 40pin header |
Power supply | ATX6pin, 12V±5% (supplied by included AC adapter) |
Size | SOM: 77mm x 118mm Carrier: 312mm x 111.15mm |
Operating temperature range | 0 to 40°C |
Accessories | AC adapter (12V) Micro SD 32GB USB micro Type-C cable |
Board introduction video
Documents
User Manual
Item | Rev. | Download | Applicable Serial Numbers | Note |
Getting Started | 1.0 | sulfur_getting_started_EN_v1.0.pdf | EN : English | |
sulfur_getting_started_JP_v1.0.pdf | JP : Japanese | |||
User Manual | 1.1 | sulfur_type-a_user_manual_EN_v1.1.pdf | A5SOM1E024 E 0001 or later | EN : English |
sulfur_type-a_user_manual_JP_v1.1.pdf | JP : Japanese | |||
1.0 | sulfur_type-a_user_manual_EN_v1.0.pdf | A5SOM1E024 D 0001 ~ A5SOM1E024 D 0025 | EN : English | |
sulfur_type-a_user_manual_JP_v1.0.pdf | JP : Japanese | |||
Hardware Manual | 1.1 | keim-a5esom_hardware_manual_EN_v1.1.pdf | A5SOM1E024 E 0001 or later | EN : English |
keim-a5esom_hardware_manual_JP_v1.1.pdf | JP : Japanese | |||
1.0 | keim-a5esom_hardware_manual_EN_v1.0.pdf | A5SOM1E024 D 0001 ~ A5SOM1E024 D 0025 | EN : English | |
keim-a5esom_hardware_manual_JP_v1.0.pdf | JP : Japan |
Board Reference
Category | Item | Rev. | Download | Applicable Serial Numbers | Note |
Schematics | SoM | SoM 1.1 | Download form | A5SOM1E024 E 0001 or later | Changes: P04: R77 marked as unimplemented. P12: Changed SDM_OSC_CLK frequency comment from 125MHz to 25MHz |
SoM | 1.0 | A5SOM1E024 D 0001 ~ A5SOM1E024 D 0025 | |||
Type-A Carrier | 1.0 | ||||
BOM | SoM | 1.1 | A5SOM1E024 E 0001 or later | ||
1.0 | A5SOM1E024 D 0001 ~ A5SOM1E024 D 0025 | ||||
Type-A Carrier | 1.0 |
- You can check the revision of your Sulfur board at the following page
Reference Design
GHRD (Golden Hardware Reference Design)
Quartus Prime Pro 25.1
Item | Rev. | Download | Note |
Linux SD Card Image | 1.9 | sdimage_agilex5_sulfur_QPDS25.1_v1.9.zip | U-Boot : v2025.01, Arm Trusted Firmware : v2.12.0 Linux Kernel : v6.12.11-lts Rootfs : Yocto Poky 5.1.4 (styhead) * OSS source code and build information can be downloaded here FPGA Configuration File |
FPGA Configuration File | 1.9 | sulfur_ghrd_top_hps_QP25.1_v1.9.sof (sdmosc25MHz) | FPGA configuration image used in Linux SD Card Image v1.9. * The data to be selected depends on the revision of the board (SDM OSC clock is 25 MHz or 125 MHz). * See note below |
sulfur_ghrd_top_hps_QP25.1_v1.9.jic (sdmosc25MHz) | |||
sulfur_ghrd_top_hps_QP25.1_v1.9_sdmosc125MHz.sof | |||
sulfur_ghrd_top_hps_QP25.1_v1.9_sdmosc125MHz.jic | |||
HW Reference Design | 1.9 | sulfur_ghrd_top_QP25.1_v1.9.qar (sdmosc25MHz) | The EMIF IP related output file paths are long and may cause compile errors in Windows environments. You can remove the file path restriction by editing the registry, but you do so at your own risk. HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\ Control\FileSystem LongPathsEnabled is set to 1 Please set |
sulfur_ghrd_top_QP25.1_v1.9_sdmosc125MHz.qar |
- Please review the following pages before using the Sulfur board
- Please confirm the serial number of your Sulfur Board from the following page.
- (The available designs for Quartus Prime Pro 24.2 and later versions depend on the frequency of the SMD OSC clock on the board.
- Sulfur Board Usage Notes
- If you want to build your own bootloader or Linux kernel, please refer to the following pages
- Free license is available for Agilex™ 5 FPGA
Click here for past versions
Quartus Prime Pro 24.3.1
Item | Rev. | Download | Note |
Linux SD Card Image | 1.8 | sdimage_agilex5_sulfur_QPDS24.3.1_v1.8.zip | U-Boot : v2024.07, Arm Trusted Firmware : v2.11.1 Linux Kernel : v6.6.51-lts Rootfs : Yocto Poky 5.1.2 (styhead) * OSS source code and build information can be downloaded here FPGA Configuration File |
FPGA Configuration File | 1.8 | sulfur_ghrd_top_hps_QP24.3.1_v1.8.sof (sdmosc25MHz) | FPGA configuration image used in Linux SD Card Image v1.8. * The data to be selected depends on the revision of the board (SDM OSC clock is 25 MHz or 125 MHz). * See note below |
sulfur_ghrd_top_hps_QP24.3.1_v1.8.jic (sdmosc25MHz) | |||
sulfur_ghrd_top_hps_QP24.3.1_v1.8_sdmosc125MHz.sof | |||
sulfur_ghrd_top_hps_QP24.3.1_v1.8_sdmosc125MHz.jic | |||
HW Reference Design | 1.8 | sulfur_ghrd_top_QP24.3.1_v1.8.qar (sdmosc25MHz) | In Quartus Prime Pro Edition Software v24.3.1, the problem with the HPS EMIF IP parameter setting window not being editable has been resolved. However, the EMIF IP related output file paths are long and may cause compile errors in Windows environments. You can remove the file path restriction by editing the registry, but you do so at your own risk. HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\ Control\FileSystem LongPathsEnabled is set to 1 Please set |
sulfur_ghrd_top_QP24.3.1_v1.8_sdmosc125MHz.qar |
Quartus Prime Pro 24.2
Item | Rev. | Download | Note |
Linux SD Card Image | 1.6 | sdimage_agilex5_sulfur_QPDS24.2_v1.6.zip | U-Boot : v2024.01, Arm Trusted Firmware : v2.10.1 Linux Kernel : v6.6.22-lts Rootfs : Yocto Poky 5.0.2 (scarthgap) * OSS source code and build information is available here OSS source code and build information can be downloaded from here. |
FPGA Configuration File | 1.6 | sulfur_ghrd_top_hps_QP24.2_v1.6.sof (sdmosc25MHz) | FPGA configuration image used in Linux SD Card Image v1.6. * The data to be selected depends on the revision of the board (SDM OSC clock is 25 MHz or 125 MHz). * See note below |
sulfur_ghrd_top_hps_QP24.2_v1.6.jic (sdmosc25MHz) | |||
sulfur_ghrd_top_hps_QP24.2_v1.6_sdmosc125MHz.sof | |||
sulfur_ghrd_top_hps_QP24.2_v1.6_sdmosc125MHz.jic | |||
HW Reference Design | 1.6 | sulfur_ghrd_top_QP24.2_v1.6.qar (sdmosc25MHz) | The path to the EMIF parameter file must be specified as an absolute path. When recompiling, you need to set it appropriately for your PC environment. For details, please refer to the following page: How to change file path for EMIF |
sulfur_ghrd_top_QP24.2_v1.6_sdmosc125MHz.qar |
Quartus Prime Pro 24.1
Item | Rev. | Download | Note |
Linux SD Card Image | 1.0 | sdimage_agilex5_sulfur_QPDS24.1_v1.0.zip | U-Boot : v2023.10, Arm Trusted Firmware : v2.10.0 Linux Kernel : v6.1.68-lts Rootfs : Yocto Poky 4.3.4 (nanbield) * OSS source code and build information is available here OSS source code and build information can be downloaded from here. |
FPGA Configuration File | 1.3 | sulfur_ghrd_top_hps_QP24.1+0.08_v1.3.sof | FPGA configuration image used in Linux SD Card Image v1.3. |
sulfur_ghrd_top_hps_QP24.1+0.08_v1.3.jic | |||
HW Reference Design | 1.3 | sulfur_ghrd_top_QP24.1+0.08_v1.3.qar |
Quartus Prime Pro Edition Software v24.1 patch0.08 |
Other Reference Designs
Item | URL | Note |
EMIF (External Memory Interface) | LPDDR4 I/F Sample Design for Mpression Sulfur Type-A Development Kit | The following is a sample design for accessing the three LPDDR4 ports on the Sulfur. |
MIPI to HDMI | MIPI-to-HDMI Sample Design for Mpression Sulfur Type-A Development Kit | Connect an IMX219 CMOS camera module to the two MIPI CSI-2 2-lane (15pin) ports on Sulfur, process the input video with the Video and Vision Processing Suite for white balance, black level correction, and demosaicing in an FPGA, and then process it in HDMI. The design is processed by FPGA and output via HDMI (1080p60). |
Nios V | TBD | |
PCIe Endpoint | TBD | |
CAN Interface | How to use microcontroller for CAN I/F: for Mpression Sulfur Type-A Development Kit | This section describes the interface between the FPGA and the microcontroller with built-in CAN controller (MCU), which is the configuration around CAN (Controller Area Network) mounted on Sulfur. In addition, sample designs (FPGA and MCU) prepared for CAN I/F verification and the operation check procedure are also introduced. |
agilex5-demo-hps2fpga-interfaces |
https://github.com/altera-fpga/agilex5-demo-hps2fpga-interfaces |
This project is a demonstration and evaluation example showing how users can implement and operate various hardware interfaces between a hard processing system (SoC) and an FPGA fabric in the Agilex 5 FPGA device family. |
Demonstration
Demo | Vender | Japanese | English |
SLVS-EC | Macnica | ||
ISP | Shikino High-Tech | Coming Soon | Coming Soon |
UDP 10G Offload | Design Gateway | N/A | |
NVMe | Design Gateway | N/A | |
Type-B Carrier Board
This product is currently under development and specifications and functions are subject to change without notice. Please note that specifications and functions are subject to change without notice.