1. Introduction
This article introduces a design that connects in which a CMOS camera module to the four MIPI CSI-2 2-lane (15-pin) port and MIPI CSI-2 4-lane (22-pin) ports on the Mpression Sulfur Type-A Development Kit (hereafter referred to as Sulfur), processes the input video with the Video and The following is a design that processes white balance, black level correction, and demosaicing in FPGA using the Video and Vision Processing Suite, and outputs the video over HDMI (1080p60).
Figure 1. Overall configuration
2. Block diagram
2-1 Overall Design
Figure 2. Overall design block diagram of Raspberry Pi Camera Module v2/v3
Figure 3. Overall design block diagram of LEOPARD IMAGING LI-AR0144-MIPI v1.0 / LI-AR0234CS-MIPI v1.0
2-2. HDMI block
Figure 4. Block Diagram of HDMI Block
3. Equipment and development environment
3-1. Equipment
- Sulfur Type-A Development Kit "Sulfur Type-A Development Kit " x 1
- FPGA download cable " Intel® FPGA Download Cable II " x 1
- MIPI Camera:
* For image sensors other than the above, please contact your sales representative or FAE.
- HDMI compatible monitor / Resolution 1920 x 1080p60
3-2. Development environment
- Quartus® Prime v24.3.1 PRO Edition
- Ashling RiscFree IDE for Intel® FPGAs v24.3.1 (for Nios® V software development)
3-3. IP Licensed for this Design
- GTS HDMI Intel® FPGA IP (paid license)
- Video and Vision Processing Suite (paid license)
- Nios® V Embedded Processor Intel FPGA IP ( free of charge, but license is required)
- MIPI CSI-2 Intel® FPGA IP ( free of charge, but license is required)
Note: FPGA development tools are available with a free license for the Agilex™ 5 E-Series. Also, since the sample design includes Nios® V/m cores, please obtain a free license for Nios® V. If you do not recompile the FPGA, you can use the free license for Agilex™ 5 E-Series. If you do not want to recompile, you can install only Quartus® Programmer.
The paid license supports IP evaluation mode.
- How to obtain a Quartus® Prime Pro Edition free license file for Agilex™ 5 E development
- How to obtain a license file for Nios® V Processor IP
- Evaluate and purchase IP
4. Sample Design Files
The table below lists the download links for the sample design files provided.
Table 1. Sample Design (Raspberry Pi Camera Module v2) File Download Links
| No. | Summary | File Name (Download Link) | Update Date/Version |
| [1] | Archive of Quartus project for CAM3 | sulfur_MIPI_CAM3_IMX219_HDMI_24.3.1.zip | 2025/03/19 - v1.0 |
| [2] | Quartus project archive for CAM4 | sulfur_MIPI_CAM4_IMX219_HDMI_24.3.1.zip | 2025/03/19 - v1.0 |
| [3] | .sof file for CAM3 | sulfur_MIPI_CAM3_IMX219_HDMI_24.3.1.sof | 2025/03/19 - v1.0 |
| [4] | .jic file for CAM3 | sulfur_MIPI_CAM3_IMX219_HDMI_24.3.1.jic | 2025/03/19 - v1.0 |
| [5] | .sof file for CAM4 | sulfur_MIPI_CAM4_IMX219_HDMI_24.3.1.sof | 2025/03/19 - v1.0 |
| [6] | .jic file for CAM4 | sulfur_MIPI_CAM4_IMX219_HDMI_24.3.1.jic | 2025/03/19 - v1.0 |
Table 2. Sample Design (Raspberry Pi Camera Module v3) File Download Links
| No. | Summary | File Name (Download Link) | Update Date/Version |
| [1] | Archive of Quartus project for CAM3 | sulfur_MIPI_CAM3_IMX708_HDMI_24.3.1.zip | 2025/04/22 - v1.0 |
| [2] | Quartus project archive for CAM4 | sulfur_MIPI_CAM4_IMX708_HDMI_24.3.1.zip | 2025/04/22 - v1.0 |
| [3] | .sof file for CAM3 | sulfur_MIPI_CAM3_IMX708_HDMI_24.3.1.sof | 2025/04/22 - v1.0 |
| [4] | .jic file for CAM3 | sulfur_MIPI_CAM3_IMX708_HDMI_24.3.1.jic | 2025/04/22 - v1.0 |
| [5] | .sof file for CAM4 | sulfur_MIPI_CAM4_IMX708_HDMI_24.3.1.sof | 2025/04/22 - v1.0 |
| [6] | .jic file for CAM4 | sulfur_MIPI_CAM4_IMX708_HDMI_24.3.1.jic | 2025/04/22 - v1.0 |
Table 3. Sample Design (LEOPARD IMAGING LI-AR0144-MIPI v1.0) File Download Links
| No. | Summary | File Name (Download Link) | Update Date/Version |
| [1] | Archive of Quartus project for CAM3 | sulfur_MIPI_CAM3_AR0144_HDMI_24.3.1.zip | 2025/06/09 - v1.0 |
| [2] | Quartus project archive for CAM4 | sulfur_MIPI_CAM4_AR0144_HDMI_24.3.1.zip | 2025/06/09 - v1.0 |
| [3] | .sof file for CAM3 | sulfur_MIPI_CAM3_AR0144_HDMI_24.3.1.sof | 2025/06/09 - v1.0 |
| [4] | .jic file for CAM3 | sulfur_MIPI_CAM3_AR0144_HDMI_24.3.1.jic | 2025/06/09 - v1.0 |
| [5] | .sof file for CAM4 | sulfur_MIPI_CAM4_AR0144_HDMI_24.3.1.sof | 2025/06/09 - v1.0 |
| [6] | .jic file for CAM4 | sulfur_MIPI_CAM4_AR0144_HDMI_24.3.1.jic | 2025/06/09 - v1.0 |
Table 4. Sample Design (LEOPARD IMAGING LI-AR0234CS-MIPI v1.0) File Download Links
| No. | Summary | File Name (Download Link) | Update Date/Version |
| [1] | Archive of Quartus project for CAM1 | sulfur_MIPI_CAM1_AR0234_HDMI_24.3.1.zip | 2025/06/09 - v1.0 |
| [2] | Quartus project archive for CAM2 | sulfur_MIPI_CAM2_AR0234_HDMI_24.3.1.zip | 2025/06/09 - v1.0 |
| [3] | .sof file for CAM1 | sulfur_MIPI_CAM1_AR0234_HDMI_24.3.1.sof | 2025/06/09 - v1.0 |
| [4] | .jic file for CAM1 | sulfur_MIPI_CAM1_AR0234_HDMI_24.3.1.jic | 2025/06/09 - v1.0 |
| [5] | .sof file for CAM2 | sulfur_MIPI_CAM2_AR0234_HDMI_24.3.1.sof | 2025/06/09 - v1.0 |
| [6] | .jic file for CAM2 | sulfur_MIPI_CAM2_AR0234_HDMI_24.3.1.jic | 2025/06/09 - v1.0 |
5. Execution Procedure
5-1. Setting of various switches and connection of various equipment
Set the slide switches on the back of the board as follows The MIPI connector on the back of the board is not used.
- Set SW19 as 1.2V
- Set SW1 and SW2 to FPGA (FPGA is set as I2C master)
Figure 5. Switch Settings
5-2 Connecting the MIPI camera to various equipment
Figure 6. Connecting the MIPI camera (2-lane) to various equipment
Figure 7. Connecting the MIPI camera (4-lane) to various equipment
5-2-1 Connecting the MIPI camera
Connect the MIPI camera to either CAM3 or CAM4 on the top of the board, or CAM1 or CAM2 on the bottom of the board. Sample designs are provided for CAM3, CAM4, CAM1, and CAM2, respectively.
Refer to the above picture for the cable direction.
5-2-2 Connection with HDMI monitor
Connect to a monitor using an HDMI cable. The output resolution is 1920/1080p60, so please prepare a monitor that supports this resolution.
5-2-3. USB Blaster II connection
Connect the USB Blaster II (Intel® FPGA Download Cable II).
5-3. Writing FPGA Configuration File and Change MSEL
Set MSEL to JTAG Mode (OFF, OFF, OFF).
Figure 6. MSEL Settings
Select the data for the camera connector (CAM3 or CAM4) you wish to use from the data provided in the " 4. Sample Design File " section and write the data.
Tip: For details on how to write the configuration file, see "5.3.2 Writing .sof Files" in Getting Started below. JIC file, please replace .sof to .jic in Change File.
5-3-1 When the configuration ROM is not rewritten (SOF)
When writing is completed, the image stream is automatically output to HDMI. 20 seconds is required due to the calibration of EMIF (External Memory Interface).
5-3-2 Rewriting the configuration ROM (JIC)
After writing is completed, change MSEL to AS (Fast) mode (sw1-3:ON, sw1-2:ON, sw1-1:OFF). (OFF, ON, ON) when viewed from the left in the above image.
When the power is turned on again, it will automatically configure and output the image stream to HDMI. 20 seconds will be required as it takes time to calibrate the EMIF (External Memory Interface) as in the case of executing with SOF.
Note: If no image is output after 30 seconds of waiting, try re-writing SOF and reconnecting the power.
6. Reference links
- Macnica Sulfur ~ Development Kit for Agilex™ 5 FPGA E-Series
- GTS HDMI Intel® FPGA IP User Guide
- Video and Vision Processing Suite Intel® FPGA IP User Guide