Introduction
When configuring Altera® FPGAs in Active Serial (AS) mode, information about configuration devices compatible with Active Serial mode, including 3rd party QSPI Flash devices, is published on Altera®’s website.
(For reference) Altera® website (Table 4 - Supported Third Party Configuration Devices)
https://www.altera.com/design/guidance/configuration#intel-supported-configuration-devices
On the other hand, many 3rd party QSPI Flash devices not listed here and unsupported by Quartus Prime Programmer also exist.
This article explains, in two parts, how to register a new QSPI Flash device not yet registered in Quartus Prime Programmer and enable configuration in Active Serial mode using the Quartus Prime "Convert Programming File" feature, with GigaDevice’s device as an example.
Target FPGAs: Cyclone V, Cyclone IV, Cyclone 10 LP, etc. (excluding Stratix 10 and Agilex series)
Part 2: How to Create the XML File
This page explains the settings for registering a new QSPI Flash device, using GigaDevice’s GD25Q256EFIRR as an example.
Please prepare the datasheet, as values will be registered from it.
* Relevant items are excerpted from the GigaDevice GD25Q256EFIRR datasheet.
Launching the Configuration Device
• Launch Convert Programming File, then configure setting ① and click the button inside the red frame.
• Configuration Device Tab Settings
Click <<new device>> and configure the items on the right side.
Click Apply to save temporarily.
Confirm that the original name has been automatically added in the Name field on the right.
* It is also possible to register the created parameters as a list item in the Programming flow template:
In that case, check Save as template, enter a name different from the original in ④, and click Apply.
Tab Settings
Set up the QSPI Flash initialization flow.
To add sequences, drag and drop from Actions:, to delete, right-click the relevant part and select delete.
You can customize the initialization flow as needed.
Clicking on a part displays the settings on the right.
Check and edit registers from the QSPI Flash datasheet.
GD25Q256E Register Configuration
• Initialization Tab Settings
・Data length: Register the length of Manufacture ID, Memory Type ID, Capacity ID
・Don’t forget "0x" to represent hex values
・Attempt count: Define the number of execution attempts
・Expected data mask: Register data values to ignore
・Delay(us): Reading immediately after command, so "0"
Write Enable
・Data: Empty since only command issuance
・Delay(us): "0" since only command issuance
Table 7. Writing to Status Register-SR No.3
・Data: Write all "0"
・Delay(us): Register the Max value of Write Status Register Cycle Time
Table 6. Writing to Status Register-SR No.2
・Data: Set S9 register to "1" to enable Quad Enable
・Delay(us): Register the Write Status Register Cycle Time value
Table 5. Checking Status Register-SR No.1
・Data length: Register "1" as register size is 8bit
・Expected data: Register the expected set value
・Attempt count: Define the number of execution attempts
・Delay(us): Reading immediately after command, so "0"
Table 7. Checking Status Register-SR No.3
・Data length: Register "1" as register size is 8bit
・Expected data: Register the expected set value
・Attempt count: Define the number of execution attempts
・Delay(us): Reading immediately after command, so "0"
Enable 4-byte addressing
・Delay(us): Reading immediately after command, so "0"
Table 6. Checking Status Register-SR No.2
・Data length: Register "1" as register size is 8bit
・Expected data: Register the expected set value
・Attempt count: Define the number of execution attempts
・Delay(us): Reading immediately after command, so "0"
• Program Tab Settings
Set the write sequence.
Issue Page Program Command
・Address: JIC (default)
・Data: JIC (default)
・Addressing mode (byte): Set to "4" (already set in Initialization tab)
・Delay(us): Register the Page Programming Time value
• Erase Tab Settings
Set the erase sequence.
Issue 64KB Block Erase Command
・Address: JIC (default)
・Erase size(byte): Register 65536 (64K byte)
・Addressing mode (byte): Set to "4" (already set in Initialization tab)
・Delay(us): "0" as execution is immediately after command
Check Erase Status
・Expected data: Register expected read value
・Attempt count: Define the number of execution attempts
・Delay(us): Multiply by Attempt count to satisfy Block Erase Time
Check with status if processing is finished
・Expected data: Register expected read value
・Attempt count: Define the number of execution attempts
• Verify/Blank-Check/Examine Tab Settings
Set sequences for comparison, blank check, and readback.
・Address: JIC (default)
・Data length: JIC (default)
・Expected data: JIC (default)
・Expected data mask: JIC (default)
・Addressing mode (byte): Set to "4" (already set in Initialization tab)
・Dummy clock cycle: "0" as execution is immediately after command
・Delay(us): "0" as execution is immediately after command
• Termination Tab Settings
Set the termination sequence (exit 4-byte addressing).
This time, keep default settings.
Once all settings are complete, click Apply to save the configuration.
This completes the task of creating the XML file.
Please return to step 3) ② in "Getting Started! Convert Programming File - Part 1: Registering and Configuring 3rd Party QSPI Flash Devices" and proceed with the settings.
References
Altera Application Note: AN 1013: Using Generic QSPI Flash on Control Block-Based Devices