1 . Overview (Configuration diagram including IPs)
This content describes how to boot a Nios® II processor from On-Chip RAM, including the minimum necessary IP parameters, BSP Editor settings, and the steps to generate various files.
The software file is stored in On Chip RAM as an initial value file.
Since there is no need to Boot, the Nios® II processor can be started immediately after the FPGA is powered up.
Please refer to the following contents for the difference of Boot Option.
・Configuration of Nios® II Boot and settings for each Boot Option
The minimum IP requirements are as follows (For Intel® Quartus® Prime development software ver 18.1)
- Nios® II Processor
- On-Chip Memory (RAM or ROM) Intel® FPGA IP: Software Execution/Storage Memory
Figure 1 shows the Platform Designer configuration.
[Figure 1] Platform Designer configuration
The following sections describe the settings of various parameters.
1-1. Nios II Processor
Set Reset Vector / Exception Vector to On Chip RAM as shown in Figure 2.
[Figure 2] Nios® II parameter settings
1-2. On-Chip Memory (RAM or ROM) Intel® FPGA IP
Set the Total Memory Size required for software execution as shown in Figure 3.
[Figure 3] Example of On-Chip Memory parameter settings
Since the software file is stored as the initial value file of the On-Chip RAM, set the Memory Initialization setting. The Memory Initialization setting differs depending on how the initial value file is registered.
- How to register the initial value file for On-Chip RAM using meminit.qip
- How to specify the initial value file in On-Chip RAM parameter settings
1-2-1. How to register the initial value file for On-Chip RAM using meminit.qip
As shown in Figure 4, check the "Initialize memory content" setting, and register meminit.qip as the Quartus® Prime design.
meminit.qip is an IP for setting initial values of On Chip RAM, and you can set initial values of On Chip RAM just by registering it in your project.
[Figure 4] Memory Initialization setting when using meminit.qip
1-2-2. How to specify the initial value file in On-Chip RAM parameter settings
As shown in Figure 5, also check "Enable non-default initialization file" and register the path of the initial value file <On_Chip_RAM_NAME>.hex.
[Figure 5] Memory Initialization setting when registering the initialization file path
1-3. Quartus® Prime Settings
Open Assignment tab -> Device -> Device and Pin Options -> Configuration.
- Configuration scheme: Set the FPGA configuration scheme
- Active serial clock source: Set the clock frequency when configuring the FPGA
[Figure 6] Quartus® Prime Device and Pin Options
2. BSP Editor Settings for Nios® II SBT
Lanch the Nios® II Software Build Tools (SBT) for Eclipse and generate the Application and BSP.
Start the BSP Editor and configure the Linker Script and hal.linker settings.
Set the Linker Script as shown in Figure 7.
Set all sections to On-Chip RAM.
[Figure 7] Linker Script settings
Then, in the Main tab, under Settings -> Advanced -> hal -> linker, check only "allow_code_at_reset" for the hal.linker option as shown in Figure 8.
[Figure 8] hal.linker settings
Note: If you ever reboot the Nios® II Core with Reset, please enable "enable_alt_load" and "enable_alt_load_copy_rwdata".
Reference: Nios® II Software Developer Handbook > 5.10.4. Run from Initialized Memory Configuration
If your software has a .rwdata section that must be reinitialized at processor reset, turn on the hal.linker.enable_alt_load_copy_rwdata setting in the BSP.
This completes the setup for Boot from On Chip RAM.
The next step is to generate the HEX file and Programming file for the On Chip RAM.
3. How to generate the Programming file
After the software has been compiled by Nios® II SBT and the ELF file has been generated, the next step is to generate the HEX file. By registering the HEX file as the initial value of On Chip RAM in your project, you can generate an SOF file with the software files and boot the Nios® II.
3-1. HEX file Generation
Once the ELF file has been generated, right-click the Nios® II application as shown in Figure 9, and use Make Targets -> Build... -> mem_init_generate -> Build to generate the HEX file.
[Figure 9] mem_init_generate for HEX
There are three main types of files generated by mem_init_generate
- meminit.qip: IP for the initial value file of On Chip RAM. Registered in the project and used (see 1-2-1 for registration method)
- <On_Chip_RAM_NAME>.hex: Initial value file for RAM when Booting from On Chip RAM (see 1-2-2 for registration method)
- <On_Chip_Flash_NAME>.hex: Software file to be included in the JIC file (not used this time)
Register the generated file according to the registration method.
3-2. POF File and JIC File
When Booting from On-Chip RAM, the software file is registered as the initial value file, so the SOF file contains the software information.
Therefore, the software information can be reflected in the Programming file by generating POF file and JIC file from the SOF file as usual.
For information on how to incorporate the updated HEX file into the SOF file without fully compiling Quartus® Prime, please refer to this page.
Nios II - Booting from On-Chip Memory - (In Japanese)
Recommended Pages
We have prepared a "Nios® II Summary Page - (In Japanese)" that summarizes various information on Nios® II. Please refer to this page as well, as it is full of useful information other than this article.
- Nios® II Summary Page - (In Japanese)