Introduction
This article describes how to launch U-Boot from the Arm® Development Studio 5 Intel® SoC FPGA Edition (hereafter DS-5) debugger targeting an Arria® 10 SoC.
Reference:
If you are using Cyclone® V SoC, please refer to the following web page.
(For Arria® V SoC users, please refer to the following web page.)
How to Boot U-Boot on DS-5 - (In Japanese)
Basically, the procedure is the same as the one shown on the web page for the Cyclone® V SoC (see above), but for the Arria® 10 SoC, please note the following points.
Note 1:
The build process of the U-Boot for Arria® 10 SoC is supported only on Linux OS, so it is recommended to debug under Linux OS (or you can start a Linux Virtual Machine on a Windows® host OS).
Note 2:
U-Boot requires configuration of the FPGA side circuitry. In particular, if access to the boot devices (SD card, QSPI Flash, NAND Flash) for the Hard Processor System (HPS) is not working, please enable the optional External FPGA Configuration option in the BSP Editor when generating the U-Boot for debugging.
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When External FPGA Configuration is enabled:
Please configure the FPGA side with .sof before starting debugging.
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If External FPGA Configuration is disabled:
Write the .rbf file on the boot device in an appropriate location beforehand.
The following is a description of the procedure.
1. Booting the DS-5
When working on a Linux OS, first start the terminal.
Then, run "embedded_command_shell.sh" on the terminal to launch a shell environment with environment variable settings for the Intel® SoC FPGA Embedded Development Suite (SoC EDS), type "eclipse &" and press Enter key.
After the DS-5 splash screen appears, the Workspace selection screen will appear, so specify the directory that contains the BSP project generated by the BSP Editor.
Specify the following directory when trying with the sample design that comes with SoC EDS.
(e.g. /home/<user>/intelFPGA/18.1/embedded/examples/hardware/a10_soc_devkit_ghrd/software)
After starting DS-5, the first screen "Welcome Screen" may be closed immediately.
If this is the first time the Workspace is specified, it will start with an empty project as shown below.
2. Project creation
Next, create a DS-5 project for U-Boot.
Select "File -> New -> Makefile Project with Existing Code" from the window menu.
The New Project window will appear, and in the "Existing Code Location" field, specify the location of the BSP project that contains the U-Boot. The location can be specified in a separate window by clicking the [Browse...] button.
(e.g. /home/<user>/intelFPGA/18.1/embedded/examples/hardware/a10_soc_devkit_ghrd/software/bootloader_ext_cfg)
Other items do not need to be edited. After specifying the location, click the [Finish] button.
Success is indicated when the project (blue frame) is added to the Project Explorer as shown below.
3. Build U-Boot (if necessary)
It is also possible to build U-Boot on DS-5. Right-click on the Project Explorer and select "Build Project", or select "Project -> Build Project" from the window menu.
Note 3:
Perform the build when using the BSP project included in the sample design supplied with SoC EDS for the first time. The U-Boot source tree is not included after the tool is installed, and the source tree will be expanded in the project when the BSP project is built.
The following is a screen image of the build in progress.
The build is complete when the build completion message is displayed in the Console view.
4. Debug Configuration
To configure debugging settings, select "Run -> Debug Configurations..." from the window menu. (or the right-click menu in the Project Explorer.)
Once the Debug Configurations window is launched, double-click "DS-5 Debuggrer" in the menu on the left side of the window. This will generate a new configuration (New_configuration) (double-click on the item in the red frame of the screen image).
The configuration items are divided into many tabs and menus, but only two items need to be configured for this operation: the Connection tab and the Debugger tab.
The following is a description of the settings for each tab.
4-1. Connection tab settings
Select target as "Intel SoC FPGA -> Arria 10 SoC -> Bare Metal Debug -> Debug Cortex-A9_0". Set all other items in the red frame according to the environment to be debugged.
Note 4:
To specify Connection, click the [Browse...] button and select from the list displayed in a separate window, but the power of the target board must be turned on beforehand.
Note 5:
When using the Intel® FPGA Download Cable (USB-Blaster) in a Linux OS environment, the USB device identification rule (ID) must be registered in udev.
See also: USB-Blaster Driver for Linux (Driver Setup on RedHat Linux Enterprise 5 and Above)
You can specify any name for the newly created configuration by editing the Name (blue frame).
4-2. Debugger Tab Settings
Specify the same settings as the screen image (red frame) below. The debugger script and source search directory can both be specified from the [Workspace...] button.
After completing the settings, click the [Apply] button to save the settings. If the configuration has been renamed, the new name will be reflected in the blue box on the left side of the window when the configuration is saved.
5. Start debugging
Note 6:
"If External FPGA Configuration is enabled, write .sof at this point to complete the FPGA side configuration." (Remember to write the .rbf to the boot device beforehand, even if External FPGA Configuration is disabled.)
Click the [Debug] button to start debugging.
Click "Yes" when prompted to switch to the debug perspective (screen layout for debugging).
After switching to the debug perspective and starting the connection with the target, wait for the connection to be completed.
Check the progress in the log in the Commands view and in the progress bar.
6. Debug connection complete
When the connection is successfully completed, the program stops at a breakpoint near the beginning of function: board_init.
At this point, the UART terminal will display the following log.
Conclusion
With the above steps, you can load the U-Boot from DS-5 and start execution. Use the debugger to debug. If you run U-Boot to the end by pressing Running (F8), you can use the various confirmation commands implemented in U-Boot.
A list of U-Boot commands (HELP display) is shown at the end. Please refer to the available command operations.
SOCFPGA_ARRIA10 # help
? - alias for 'help'
base - print or set address offset
bdinfo - print Board Info structure
bootm - boot application image from memory
bootp - boot image via network using BOOTP/TFTP protocol
bootz - boot Linux zImage image from memory
clocks - display clocks
cmp - memory compare
cp - memory copy
crc32 - checksum calculation
dcache - enable or disable data cache
ddrcal - run ddr calibration sequence
dhcp - boot image via network using DHCP/TFTP protocol
echo - echo args to console
editenv - edit environment variable
env - environment handling commands
erase - erase FLASH memory
exit - exit script
false - do nothing, unsuccessfully unsuccessfully
fatinfo - print information about filesystem
fatload - load binary file from a dos filesystem
fatls - list files in a directory (default /)
fatsize - determine a file's size
fatwrite- write file into a dos filesystem
fdt - flattened device tree utility commands
flinfo - print FLASH memory information
fpga - loadable FPGA image support
fpgabr - fpgabr [0|1]
go - start application at address 'addr'
help - print command description/usage
i2c - I2C sub-system
icache - enable or disable instruction cache
iminfo - print header information for application image
loop - infinite loop on address range
md - memory display
mdio - MDIO utility commands
mii - MII utility commands
mm - memory modify (auto-incrementing address)
mmc - MMC sub system
mmcinfo - display MMC info
mtest - simple RAM read/write test
mw - memory write (fill)
nm - memory modify (constant address)
ping - send ICMP ECHO_ REQUEST to network host
printenv- print environment variables
protect - enable or disable FLASH write protection
reset - Perform RESET of the CPU
run - run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
showvar - print local hushshell variables
sleep - delay execution for some time
source - run script from memory
test - minimal test like /bin/sh
tftpboot- boot image via network using TFTP protocol
true - do nothing, successfully
txloop - blast a packet!
version - print monitor, compiler and linker version