* The original content was created in Japanese, so some information, images, and links may still be in Japanese. We’re updating gradually and appreciate your patience.
Introduction
In response to the recent increase in data bandwidth, AD converters and DC converters have become mainstream products that support high speed.
JESD204B is the standard for connecting these high-speed converters to FPGAs.
In the past, a parallel interface (LVDS) was used to connect the converters, but this has caused problems such as an increase in the number of pins in the IC and the resulting complexity of board wiring. The JESD204 was introduced to solve these problems by using a serial interface.
Please refer to the following page for the history of JESD204B.
This page introduces information and reference materials on the JESD204B device from Analog Devices, which has a proven track record of interfacing with Altera® FPGAs.
For model numbers other than those listed below, please contact us.
Interoperability Implementation Results
As of June 2020
Reference Materials
The following link provides a report of the interoperability test provided by Altera Corporation.
Stratix® 10
- AD9625 - Stratix® 10 L-Tile
- AD9208 - Stratix® 10 E-tile
- AD9174 - Stratix® 10 L-tile
- AD9213 - Stratix® 10 L-tile
Arria® 10 / Stratix® V
- AD9162 - Arria® 10 GX
- AD9680 - Arria® 10 GX/Stratix V
- AD9625 - Arria® 10 GX/Stratix V
- AD6676 - Arria® 10 GX
- AD9144 - Arria® 10 GX