1. Overview
This article describes the development of the Nios® V processor from the On-Chip Flash (hereinafter referred to as UFM), this article introduces the minimum IP parameters and BSP Editor settings required to boot the Nios® V processor from the On-Chip Flash,
The Boot method described in this article stores software files in the UFM, allowing you to boot the Nios® V processor on a single chip without the need for an external memory device. Nios® V by storing the software files in the UFM.
The required configuration is almost the same as for Nios® V, with a few operational differences. Nios®II, so you can use Nios® II, please refer to the article below for a better understanding.
Reference: Types of Nios® II Boot and how to configure each Boot Option - (In Japanese)
2. Configuration and IP settings
The minimum IP requirements are as follows (Intel® Quartus® Prime Standard Edition software version 23.1).
- Nios® V/m Processor Intel® FPGA IP (Nios® V/g, Nios® V/c also available)
- On-Chip Flash Intel® FPGA IP
- Memory Device for rewritable data expansion (On-Chip RAM, etc.)
The following figure shows the configuration when built using Platform Designer.
Figure 1. Platform Designer Configuration
In this article, JTAG_UART IP is implemented for console output, but please note that it is not required.
The names of the implemented IPs are set as follows to improve visibility.
- Clock Bridge Intel® FPGA IP : Clock
- Nios® V/m Processor Intel® FPGA IP：NiosV_m
- On-Chip Flash Intel® FPGA IP：Onchip_Flash
- On-Chip Memory (RAM or ROM) Intel® FPGA IP：OCRAM
- JTAG UART Intel® FPGA IP : JTAG_UART
The IP required for this Boot configuration - the Nios ® V processor, UFM, and on-chip RAM - are described in the next section.
2-1. Nios® V/m Processor Intel® FPGA IP
Check "Enable Debug" and "Enable Reset From Debug Module" in the Debug section as shown in the figure below , then set Reset Agent in the Vectors section to "Onchip_Flash.data".
Figure 2. Nios® V Processor Parameter Settings
NOTES:
When selecting the Reset Agent: pull-down menu, the "Onchip_Flash.data" port may not appear. In this case, select a different port and open the pull-down menu again to select it.
2-2. On-Chip Memory (RAM or ROM) Intel® FPGA IP
Set the Total memory size required for software execution as shown in the figure below .
Figure 3. On-Chip RAM Parameter Settings
2-3. On-Chip Flash Intel® FPGA IP
Set the Configuration Mode and Flash Initialization sections as shown in the figure below .
The details are described in the next section.
Figure 4. On-Chip Flash Parameter Settings
2-3-1. Configuration Mode
In Configuration Mode, the configuration image storage method is configured. The Sector assignment differs depending on the mode, so please refer to the figure below for an overview.
Figure 5. Sector Allocation in Each Configuration Mode
The following three Configuration Modes support UFM Boot.
Select one of the following Configuration Modes according to the system specifications.
- Single Uncompressed Image
- Single Compressed Image
- Dual Compressed Images
2-3-2. Flash Initialization
Flash Initialization is used to set the .hex file to be registered as the initial value of UFM.
However, Nios® V does not support the meminit option, so .sof and .hex files generated by Convert Programming File are converted to .pof files. Therefore, there is no need to register a .hex file as an initial value file. Disable the settings in the Flash Initialization section as shown below .
The method of creating a .hex file is described in "4. How to Generate Programming File".
Figure 6. Flash Initialization Settings
3. BSP Editor Settings
Start the BSP Editor from the Nios® V Command Shell and create a Setting.bsp file. If you do not know how to create the file, please refer to the following link.
3-1. Configuration for running with Boot Copier
Boot Copier is a Boot method to run Nios® V by extracting necessary data from Flash ROM to RAM by Boot Loader called Boot Copier. Boot Copier will extract all the necessary data into RAM, so turn off all checkboxes in hal.linker. Figure 7 shows an example of this setting.
Figure 7. Configuration of hal.linker in Boot Copier
To set the Linker Script, select the Linker Script tab in the BSP Editor and set the .text Section to On-Chip RAM (OCRAM) or external RAM, and set the other Sections to On-Chip RAM or external RAM.
Figure 8. Linker script setting in Boot Copier
3-2. Settings for execution by XIP
XIP (Execute in Place) is a Boot method in which the .text area of the Linker Section is allocated to the Flash Controller to run Nios® V on Flash ROM. If sections other than .text are set to be stored in RAM, all check box settings in hal.linker must be enabled in order to deploy them in RAM at Boot time.
Figure 9. Configuration of hal.linker in XIP
To set the Linker Script, select the Linker Script tab in the BSP Editor and set the .text Section to "Onchip_Flash" as shown below.
Notes:
The .rwdata section, .heap section, and .stack section (read/write data area) must be placed in RAM even when used in the XIP configuration because they involve Flash rewriting.
Figure 10. Linker script configuration in XIP
Note:
If Exception vector memory is set to On chip Flash, turn off the "enable_alt_load_copy_exceptions" checkbox from the settings in hal.linker.
4. How to Generate Programming File
In case of Nios® V Boot using UFM, since mem_init is not supported, the .hex file to be stored in UFM is generated by using the command in Nios® V Command Shell.
4-1. ELF to HEX Command for Boot Copier
The following is the procedure for generating a .hex file for Boot Copier.
Please note that the procedure described in this section is based on the assumption that the Nios® V software is running in the debugger according to the contents below.
Reference: Nios® V Project Development Procedure Using Ashling* RiscFree* IDE
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- Copy the Boot Copier (.srec) file from the following path to the app folder of Nios® V, where the .elf file was generated after the Build was completed.
<Quartus® Prime installation directory>\niosv\components\bootloader
When using Nios® V/c: niosv_c_bootloader.srec
When using Nios® V/m: niosv_m_bootloader. srec
When using Nios® V/g: niosv_g_bootloader.srecPoint:
Copy Boot Copier to the same directory as the .elf file to avoid absolute paths and commands not working, etc.
- Start the Nios® V Command Shell and set the current directory to the app folder.
- Execute the following commands with the arguments appropriate for your environment.
- Copy the Boot Copier (.srec) file from the following path to the app folder of Nios® V, where the .elf file was generated after the Build was completed.
Point:
First, run elf2flash.exe to merge the application executable (.elf) and Boot Copier (.srec) to generate S-Record format (.srec), and then convert it to Hex format (.hex) by objcopy in a two-step procedure. The two-step procedure is as follows.
Execution command
elf2flash --input <Input file name(.elf)> --output <Output file name(.srec)> --reset <Nios V Reset Address> --base <UFM base address> --end <End address of UFM> --boot <Boot Copier(.srec)>
riscv32-unknown-elf-objcopy --input-target srec --output-target ihex <Input file name(.srec)> <Output file name(.hex)>
Example of command execution
elf2flash --input app.elf --output flash.srec --reset 0x00000000 --base 0x00000000 --end 0x0006ffff --boot niosv_m_bootloader.srec
riscv32-unknown-elf-objcopy --input-target srec --output-target ihex flash.srec app.hex
4-2. ELF to HEX command for XIP
The following is the procedure for generating a .hex file for XIP.
Please change to the Boot Copier setting, confirm that the Nios® V software is running in Run As, and then change back to the XIP setting to generate the .hex file.
Reference: How to debug in XIP configuration - (In Japanese)
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- Start the Nios® V Command Shell and change the current directory to the app folder.
- Execute the following command with the appropriate arguments for your environment.
Execution command
riscv32-unknown-elf-objcopy --output-target ihex <Input file name(.elf)> <Output file name(.hex)>
Example of command execution
riscv32-unknown-elf-objcopy --output-target ihex app.elf app.hex
4-3. Generation of POF file
To Boot from UFM, convert .sof and .hex files to .pof files and write them to UFM. The procedure is the same as for Nios® II, so please refer to the following contents.
Reference: Nios® II - Booting from On-Chip Memory - (In Japanese)
After the .pof file has been generated by Convert Programming Files, you can actually write it to MAX 10 device to see how it works.
Conclusion
This is how to boot Nios® V using UFM.
Although there are some differences in GUI and commands, we hope you have found that there is not much difference from Nios® II.
For more information on Nios® V processors, please refer to the manufacturer's page below.
We have also compiled information on Nios® V on our Nios® V Summary Page - (In Japanes) which contains a summary of information on Nios® V. Please refer to this page as well, as it contains useful information other than this article.