Hello! This is Topu.
In my previous article, I was able to successfully find a logic error using ModelSim®.
I learned the importance of simulation from the painful experience of not having done simulation, which delayed the discovery of errors in circuit descriptions.
After that, I studied about the test bench, and now I am no longer afraid of simulation.
In this article, I would like to introduce the points I keep in mind when writing testbenches for those who are not good at writing testbenches, including the misunderstandings I had when I was not used to writing testbenches, and would like you to know that simulation can be done easily.
I would like to explain how to write a testbench, but before that, I would like to review the flow of ModelSim simulation.
ModelSim simulation consists of the following steps
1. create testbench file
2. write test pattern
3. run simulation to check waveforms
The following is the sequence of the simulation.
1.Creating the test bench file
Please refer to the article by a senior engineer (" Chef's Whimsical Test Bench: The Secret Recipe for Saving Time", a new engineer's blushing blog ).
In this article, we will describe how to write test patterns using the testbench file generated by the method described in 1.
2.Writing Test Patterns
Please refer to Figure 1.
Figure 1 Example of testbench description
The explanation is given from the top. This time, we will introduce how to describe a testbench in Verilog HDL.
The tool has automatically written it for you in 1. creating a testbench file.
Thanks to the features of Quartus® II and the articles of our predecessors!
Therefore, you only need to write the test pattern part by yourself this time!
It means that you only need to remember how to write this part of the simulation!
Now, let me describe the test pattern in detail.
However, there are only a few points to keep in mind, and they are very simple.
In this article, we will use the actual test pattern used in the previous article as an example.
Figure 2. Example of test pattern description
The input waveform we are going to give this time is as follows,
reset : "Low" for the first 200(ns), then fixed at "High"
sw : Switches between "High" and "Low" every 6000(ns), then fixed at "High" at the end
CLK : A clock with a period of 100(ns)
The three types of test patterns are as follows.
Test pattern descriptions can be broadly classified into the following categories
(1) A description that is executed only once (initial statement)
(2) A description that is executed repeatedly (always statement)
The test pattern can be easily described in two types of statements: (1) a statement that is executed only once (initial statement)
Figure 3. Difference in execution between initial and always statements
(1) Description that is executed only once (initial statement)
This is described in the initial statement. In this case, it is used to describe signals that change little and have no fixed pattern, such as “reset” and “sw.
If the “sw signal pattern” in Figure 2 is described, the input waveform shown in Figure 4 can be created.
Figure 4 Test pattern using Initial statement
#6000, for example, can be written to change the signal after a specified time.
The time is represented by the number you specify, which depends on the unit specified in timecale.
In this example, 1 ns is specified in timescale, which means that 6000 ns of time has elapsed.
In addition, the following is an example of a waveform change time! When describing the time of change of a waveform, it is important to note that the numbers after # are additive.
At first, I tried to give the input waveform as shown in Figure 4 and wrote #6000#12000#18000 as shown in Figure 5, resulting in an input waveform that was completely different from what I expected.
Figure 5: My incorrect description and its waveform
2) Statements to be executed repeatedly (always statement)
This is described in the always statement. In the example, the always statement is used to describe a signal that changes repeatedly, such as CLK (clock).
Figure 6: Test pattern using the always statement
Again, there are some points to note.
If you want to create a waveform with a period of 100 (ns), you need to describe the change time of each "High" and "Low" signal. Again, I tried to make a waveform with a period of 100(ns) and made the mistake of writing #100, resulting in a period of 200(ns).
This is how to write a test bench.
Doesn't it seem surprisingly easy? Yes, it is easy! I am thankful that the tool has written it for me up to the middle of the process.
I was not good at testbench, but now I am good at it.
Conclusion
･Testbench must be written for simulation
･Writing testbench by yourself is only test pattern (when you use Test Bench Writer)
･It is OK if you remember 2 kinds of test pattern
･The time after # in initial statement is added
･The time after # in always The time after # in the always statement describing the clock is half of the cycle.
Recommended articles and documents
New Engineer's Blush Blog Articles