The following are the sources of input Reference Clock that can be used with the Cyclone® 10 GX transceiver.
Dedicated reference clock pins
- Reference clock network
- The output of another fPLL with PLL cascading
- Receiver input pins
- Global clock or core clock
Altera® Cyclone® 10 GX Transceiver PHY User Guide
https://docs.altera.com/r/docs/683054/20.1/cyclone-10-gx-transceiver-phy-user-guide/intel-cyclone-10-gx-transceiver-phy-overview
(See section Input Reference Clock Sources)
If you are using a protocol with strict Jitter requirements, select "Dedicated reference clock pins" and place them as close as possible to the
transmit PLL.
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Category: Transceivers
Tools: Quartus® Prime
Device: Cyclone® 10 GX