If RAM is described in HDL to be inferred, it may be assigned to logic depending on how it is described.
Also note that there are limitations on memory configuration.
(Ref. Why does my RAM inference fail for Stratix 10 designs?
https://community.altera.com/kb/knowledge-base/why-does-my-ram-inference-fail-for-stratix-10-designs/341381
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Category:Quartus® Prime
Tools:Quartus® Prime
Device:Stratix® 10