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I am using PCI-Express (PCIe) with DMA IP on Arria® 10, but I get errors in compilation. What is the workaround?

I am using PCI-Express (PCIe) with DMA IP on Arria® 10, but I get errors in compilation. What is the workaround?

  • Updated

<Error Message>
Error (10166): SystemVerilog RTL Coding error at file_name.sv(xxx): always_comb construct does not infer purely combinational logic.
Error (12152): Can't elaborate user hierarchy "instance_name".

This error is an issue with Quartus® Prime Standard Edition and will be fixed in
v19.1, but can also be worked around by editing the RTL.

Please see the Knowledge Database below for more information.

Error (10166): SystemVerilog RTL Coding error at altpcieav_dma_hprxm_rdwr.sv(562): always_comb construct does not infer purely combinational logic.
https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/ip/2019/why-do-i-get- analysis---synthesis-error-when-enabling-burst-capa.html

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Category: PCI-Express
Tools: Quartus® Prime
Device: Arria® 10

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