It is possible, but there are several restrictions that make it basically difficult.
The limitations are summarized below.
Intel FPGA SDK for OpenCL Pro Edition: Programming Guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/opencl -sdk/aocl_programming_guide.pdf
(search for Restrictions and Limitations in RTL Support for the Intel FPGA SDK for OpenCL Library Feature)
The restrictions are that the I/F must be Avalon ST, but since most of the available IPs are Avalon MM, it is difficult to specify the actual specification.
*Document excerpt
An RTL module must use a single input Avalon-ST interface.
That is, a single pair of ready and valid logic must control all the inputs.
There are also other restrictions such as matching the input/output data width to the kernel and not allowing libraries to be connected to each other, so please pay close attention to these restrictions when considering the use of RTL modules.
*Document excerpts from
RTL modules cannot connect to external I/O signals.
All input and output signals must come from an OpenCL kernel.
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Category: OpenCL™
Tools: Intel® FPGA SDK for OpenCL™
Devices: -