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Error (suppressible): (vopt-2732) ***/emif_sim/emif/alt_mem_ddrx_controller.v(1189): Module parameter 'CFG_CMD_GEN_OUTPUT_REG ' not found for override.
This error corresponds to the following Knowledge Database (KDB) content:
https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/ knowledge-base/solutions/rd01212014_488.html
You need to change the order of loading vsim libraries as described in KDB.
Specifically, -L work must be listed first.
[Before change]
vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L arriav_ver -L arriav_hssi_ver -L arriav_pcie_hip_ver - L rtl_work -L work -L s0_seq_debug_translator -L dmaster_master_translator -L a0 -L ng0 -L rst_controller -L p2b_adapter -L b2p_adapter -L transacto - L p2b -L b2p -L fifo -L timing_adt -L jtag_phy_embedded_in_jtag_master -L mm_interconnect_0 -L dll0 -L oct0 -L c0 -L dmaster -L s0 -L m0 -L p0 -L pll0 -L emif - voptargs="+acc" dram_tb
[after modification]
vsim -t 1ps -L work -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L arriav_ver -L arriav_hssi_ver -L arriav_pcie_ hip_ver -L rtl_work -L s0_seq_debug_translator -L dmaster_master_translator -L a0 -L ng0 -L rst_controller -L p2b_adapter -L b2p_adapter -L transacto -L p2b -L b2p -L fifo -L timing_adt -L jtag_phy_embedded_in_jtag_master -L mm_interconnect_0 -L dll0 -L oct0 -L c0 -L dmaster -L s0 -L m0 -L p0 -L pll0 -L emif -voptargs="+acc" dram_tb
This avoids the error.
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Category: External Memory Interface
Tools: ModelSim® / Questa® Sim
Devices: -