Skip to main content

There is a tCS min (CS# High Time (Read Instructions), CS# High Time (Program/Erase)) timing specification on the QSPI Flash side, but there is no such timing specification on the Cyclone® V SoC side. How can I fulfill this requirement?

There is a tCS min (CS# High Time (Read Instructions), CS# High Time (Program/Erase)) timing specification on the QSPI Flash side, but there is no such timing specification on the Cyclone® V SoC side. How can I fulfill this requirement?