(See
Cyclone V Device Datasheet
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_51002.pdf
( Quad SPI Flash Timing Characteristics,
Table 43. Quad Serial Peripheral Interface (SPI) Flash Timing Requirements for Cyclone V Devices)
Of the two clocks (l4_mp_clk/qspi_ref_clk) supplied to the QSPI Controller, this is qspi_ref_clk.
(Reference)
https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cyclone-v/cv_5v4.pdf#page=1128
(Functional Description (Functional Description of the Quad SPI Flash Controller > Clocks,
or search for qspi_ref_clk)
~ Excerpts from
The qspi_ref_clk clock is the reference clock for the quad SPI controller and
is used to serialize the data and drive the external SPI interface.
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Category: SoC
Tools:-
Device: Cyclone® V