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Nativelink simulation of a circuit using On-Chip Flash IP in MAX® 10 with ModelSim®-Intel® FPGA Edition fails with Load.

Nativelink simulation of a circuit using On-Chip Flash IP in MAX® 10 with ModelSim®-Intel® FPGA Edition fails with Load.

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＜Error Message

 Error: (vsim-3033) Instantiation of 'altera_onchip_flash_block' failed.

The .sip file of the On-Chip Flash IP is not registered and ModelSim uses the source for synthesis instead of simulation.

Please enable the "Simulation" setting when you generate the On-Chip Flash IP.
Please register the .sip file (in the simulation folder) generated by Generate to your Quartus project and try the simulation. Please try the simulation.

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Category: Simulation
Tools: ModelSim®-Intel® FPGA Edition / Quartus® Prime
Device: MAX® 10

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