The MSEL[*] pin is used to determine the FPGA configuration mode.
The MSEL pin handling in Cyclone® 10 LP does not recommend inserting a pull-up/pulldown resistor, so the following should be used.
-High: Directly connected to VCCA (or through a 0Ω resistor)
-Low: Directly connected to GND (or through a 0Ω resistor)
Please be sure to check the latest English version of the document when designing.
Reference information
(See MSEL pin description)
https://docs.altera.com/r/docs/683137/current/cyclone-10-lp-device-family-pin-connection-guidelines
(Search for MSEL Pin Settings)
https://docs.altera.com/r/docs/683251/current/intel-cyclone-10-lp-device-datasheet
--------------------
Category: Specifications
Tools: -
Device: Cyclone® 10