Skip to main content

Is it possible to configure an FPGA design that uses the FPGA2SDRAM (F2S) port on a Cyclone® V SoC / Arria® V SoC after booting Linux from the Hard Processor System (HPS) side?

Is it possible to configure an FPGA design that uses the FPGA2SDRAM (F2S) port on a Cyclone® V SoC / Arria® V SoC after booting Linux from the Hard Processor System (HPS) side?