Early I/O release is a function to configure only the IO part (.periph.rbf part only) of FPGA + HPS first.
Then, by configuring the FPGA logic part (.core.rbf) at any timing, all circuits on the FPGA side can be made operational.
By using this function, the HPS SDRAM and Shared I/O on the FPGA side can be accessed from the
HPS side before the full configuration of the FPGA side logic is completed, thus accelerating the startup timing of the HPS.
--------------------
Category: SoC
Tools: -
Device: Arria® 10