You can download information on in-package routing delays by clicking on the Net Length Information for each device in the "Net Length Reports" link below.
AN 958: Board Design Guidelines
The report can also display information on the in-package routing delay of the DQ/DQS and Address/Command pins.
For example, if you are designing with Arria® 10, you need to enable the following options in the Arria® 10 External Memory Interfaces section of the IP.
"Board Timing" tab:
- FPGA DQ/DQS Package Skews Deskewed on Board
- FPGA Address/Command Package Skews Deskewed on Board
By setting this to Enable, the routing delay value in the package is reported in the Package Delay item of the .pin file.
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Category: External Memory Interface
Tools: -
Devices: -