In booting the Cyclone® V SoC, the preloader-mkpimage.bin, which is written to a boot source such as QSPI Flash or SD card, is an image of four identical Preloaders (64KB) combined in succession (256KB in total).
When retries due to boot failure occur, the four Preloaders are executed in the following sequence: 1.
1. run with the image of Preloader0
2. reset by watchdog in the image of Preloader0
3. re-boot and run with the image of Preloader1
4. reset by watchdog in the image of Preloader1
The same behavior for Preloader2 and 3
6. reset by wathdog in the image of Preloader3
7. check FPGA Fallback function and access 0xC0000000 if it is enabled
If it is disabled, it will go through an infinite loop and wait for Reset State
8. Wait for Reset
The sequence can be checked in the following Boot ROM Code Register Group register group.
https://www.altera.com/hps/cyclone-v/hps.html#topic/sfo1410068005527.html
The following statuses can be checked briefly for each register:
initswstate - whether the Preloader was successfully booted or not (whether 0x49535756 was written or not)
initswlastld - number of the Preloader currently booted.
The FPGA Fallback feature is enabled by setting the f2h_boot_from_fpga_on_failur signal on the HPS interface to High. Enable boot from fpga signals" must be checked ON in the HPS options of Platform Designer (formerly Qsys) to use this signal.
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Category: SoC
Tools: SoC EDS
Device: Cyclone® V