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Are there any commands to configure the FPGA in the U-Boot of an Arria® 10 SoC?

Are there any commands to configure the FPGA in the U-Boot of an Arria® 10 SoC?

  • Updated

In case of Early I/O Release, core configuration can be done with the following command.

　$ fpga loadfs 0 mmc 0:1 socfpga.core.rbf core

When configuring from a Hard Processor System (HPS), the rbf file to be configured is specified in bsp-editor, so basically, the configuration is done by specifying it in bsp-editor.


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Category: SoC 
Tool: SoC EDS 
Device: Arria® 10

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