Since the SDRAM controller of the SoC is on the FPGA side, partial reconfiguration is required. Please refer to the following reference design.
--------------------
Category: SoC
Tools: Quartus® Prime / SoC EDS
Device: Arria® 10
Since the SDRAM controller of the SoC is on the FPGA side, partial reconfiguration is required. Please refer to the following reference design.
--------------------
Category: SoC
Tools: Quartus® Prime / SoC EDS
Device: Arria® 10