Are the I/O pins in the MAX® 10 configuration in the Weak-PullUp ON state? Or can the user set them as desired (Hi-Z or WeakPullUp ON) in QuartPrime settings, etc.?

This can be set in ^Quartus® Prime.
However, until the ICB setting is recognized by the POR, the Weak Pull-Up is disabled and the device is in the Tri-state state.

(Reference) MAX 10 FPGA Device Architecture
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config. . pdf

(ICB Values and Descriptions for Intel MAX 10 Devices)

Device and Pin Options > Configuration > Device Options > Set I/O to weak pull-up prior to usermode: On

• On ⇒ Tri-state until Power-On Reset and Internal Pull-Up is enabled until the device enters User Mode after the Initialization Configuration Bits (ICBs) are recognized.
• Off ⇒ Tri-state from power-on and Pull-Up is disabled.

[Set I/O to weak pull-up prior to usermode: ON]

1. Tri-Stare state until ICB is recognized from POR.
2. Internal Weak PulL-Up ON (enabled) until User Mode is entered after ICB recognition.
3. After UserMode, the status is set by Quartus Prime set by the user.

[Set I/O to weak pull-up prior to usermode: Off]

1. Tri-Stare state until ICB is recognized from POR.
2. Tri-Stare state until User Mode is set after ICB recognition.
3. After User Mode, state set by Quartus Prime set by user

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Category: Specifications
Tool: ^Quartus® Prime
Device: ^MAX® 10