<Configuration
- Application interface type : Avalon-MM with DMA
- Hard IP mode : Gen2 x4, Interface 128bit,125MHz
- Port type : Native endpoint
The DMA Descriptor Controller Register is accessed via BAR0 (RXM_BAR0) reserved on the IP.
Please refer to the following document for details:
Arria® 10 or Cyclone® 10 GX Avalon® Memory Mapped (Avalon-MM) DMA Interface for PCI Express* Solutions User Guide
- 6.7.1. Read DMA Descriptor Controller Registers
https://docs.altera.com/r/docs/683425/18.0/arria-10-or-cyclone-10-gx-avalon-memory-mapped-avalon-mm-dma-interface-for-pci-express-solutions-user-guide/read-dma-descriptor-controller-registers
- 6.7.2. Write DMA Descriptor Controller Registers
https://docs.altera.com/r/docs/683425/18.0/arria-10-or-cyclone-10-gx-avalon-memory-mapped-avalon-mm-dma-interface-for-pci-express-solutions-user-guide/write-dma-descriptor-controller-registers
Please review the following items regarding the DMA execution procedure.
- 6.7.4. Read DMA Example
https://docs.altera.com/r/docs/683425/18.0/arria-10-or-cyclone-10-gx-avalon-memory-mapped-avalon-mm-dma-interface-for-pci-express-solutions-user-guide/read-dma-example
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Category: PCI-Express
Tools: -
Device: Arria® 10