We are designing a PCI-Express (PCIe) Root Port - Endpoint (using Avalon-ST interface) with two Arria® 10 devices facing each other. Is it possible for the Endpoint to get information about the Con...

In a PCIe system, a Configuration Transaction is basically issued from the Root Port side and a Configuration Read/Write is performed on the 
Endpoint side, but an interface called LMI is available for debugging purposes.

（For reference: Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-ST Interface for PCI Express* User Guide 
https://docs.altera.com/r/docs/683647/18.0/arria-10-and-cyclone-10-gx-avalon-streaming-interface-for-pci-express-user-guide/parity-signals

(LMI Signals )

This signal can be used to access the Configuration space. 
This signal should be used in Read Only mode.

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Category: PCI-Express 
Tools: - 
Device: Arria® 10