Depending on the relevant setting, the access range to the registers inside the DisplayPort IP described in Table 180. DPCD Locations in the User's Guide below will vary.
Therefore, please check which mode is available for the function you plan to use and select the mode.
(Reference) DisplayPort Intel® FPGA IP User Guide
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_displayport. pdf
(see DPCD Locations list under Sink-Supported DPCD Locations)
For example, SST (Single Stream) uses a Non-GPU and MST (Multi Stream) uses a GPU.
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Category: Display Port
Tools: Quartus® Prime
Device: -