Are there any PCB design rules for Pad on Via in Altera FPGAs?

For Stratix® 10 devices, please refer to AN766, which can be found at 
AN 766: Stratix® 10 Devices, High Speed Signal Interface Layout Design Guideline 
(search via-in-pad)

For other devices, see AN114. 
AN 114: Board Design Guidelines for Altera Programmable Device Packages
(search for "Via Capture Pad")

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Category: Specifications 
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