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I am trying to route an HPS SPI master to an FPGA on an Arria® V SoC, but I don't know how to connect each port.

I am trying to route an HPS SPI master to an FPGA on an Arria® V SoC, but I don't know how to connect each port.

  • Updated

When routing to the FPGA side, each port should be connected as shown below. 
Here is an example of a one-to-one connection between an SPI master and an SPI slave.

 .hps_0_spim0_txd (hps_spim0_txd ), // mosi 
.hps_0_spim0_rxd (hps_spim0_rxd ), // miso 
.hps_0_spim0_ss_in_n (1'b1 ), // ss_in_n Used in multi-master systems. For Motorola SPI, default to "1" 
.hps_0_spim0_ssi_oe_n (1'b0 ), // ssi_oe_n Always output for one-to-one connection. 
 .hps_0_spim0_ss_0_n (hps_spim0_ss0 ), // ss_0_n 
.hps_0_spim0_ss_1_n ( ), // ss_1_n 
.hps_0_spim0_ss_2_n ( ), // ss_2_n 
.hps_0_spim0_ss_3_n ( ), // ss_ 3_n 
.hps_0_spim0_sclk_out_clk (hps_spim0_sclk), // sclk

For details on each port, please refer to the "SPI Controller" chapter in the "Arria V Hard Processor System Technical Reference Manual". 
 

For SPI connection, please also refer to the following Example: 
https://www.intel.com/content/dam/altera-www/global/en_US/others/support/examples/soc/Altera-SoCFPGA -HardwareLib-SPI-AV-GNU.tar.gz

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Category: SoC 
Tools: Quartus® Prime 
Device: Arria® V

 

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