This can be done by using MAX® 10's ability to adjust the CLKCTRL delay.
Constraints are made in the Assignment Editor.
To : Input clock signal
・Assignment Name : Input Delay from Dual-Purpose Clock Pin to Fan-Out Destinations
・Value : Any value from 0-63 (larger value increases delay)
・Enable : Yes
After compiling with the above settings, please check the amount of delay using Timing Analyzer.
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Category: Timing Constraints/Analysis
Tool: Quartus® Prime
Device: MAX® 10