* The original content was created in Japanese, so some information, images, and links may still be in Japanese or no link. We’re updating gradually and appreciate your patience.
About the New Engineer's Blush Blog
This blog introduces the flow of Macnica Ultima Company's new engineers from questions they had during their training to solving problems that arose.
We hope you will use the practical know-how gained from the struggles of these highly individualistic newcomers in your work.
Lots of useful information!
Analog related articles
- The Magic of Coils - Boosting Voltage
- Continued! The Magic of Coils - Boosting Voltage
- Oscilloscope Trigger - Triggering? -
- What are the different types of resistors? The characteristics and uses of each!
- What are passive and active components? About the difference between each!
Programming Articles
- Types of logic circuits - Sequential? Combinational?
- The World of Numbers in Bits - Signs
- The World of Numbers in Bits - Floating Point
- NULL, what the heck is it? ~ indicating the end of a string ~
- Initial value problem ver. C Language
- Actually the same person! Arrays and pointers
- Thanks to line buffers - Kuramii's struggles with C Language
- ASCII code table
- The reality of ASCII codes [Part 1] - 1 but 49 ? Input/output format -
- The reality of ASCII codes [Part 2] - Correspondence between ASCII codes and characters -
- The reality of ASCII codes [Part 3] - Subtract '0' from num ? -
- malloc - a challenge to the unknown
- Can't people read? The Mystery of Binary Files
Processor related articles
- The CPU is a capable performer
- Microcontroller watchdog? Watchdog Timer
- Sequential Processing and Parallel Processing
- [ Nios II ] Booting from On-Chip Memory - Time-Shortened Version
- [ Nios II ] Booting from On-Chip Memory - Qsys modification
- Frequency Get with Frequency Division !
- What is the role of MMU? - Part 1
- What is the role of MMU? - Part 2
- What is UART? - The Difference Between Serial and Parallel Communication -
External Memory Interface related articles
- External Memory Interface - What is Memory?
- External Memory Interface - Read? Write?
- External Memory Interface - What is PHY?
- External Memory Interface - ALTMEMPHY? UniPHY?
- External Memory Interface - External memory interface HDR
- SDR and DDR - Processing DDR data with FPGA
- Memory IP - Accurate and efficient data transfer
- Memory IP - FPGA selection
- Memory IP - Generation and parameter entry
- Memory IP - Preset storage and recall
Clock Products Articles
- About Crystal Resonator
- Frequency Accuracy of Clock Generators
- Notation of Accuracy of Clock Signals
- VCOs and VCXOs
- Note the Amplitude of LVDS
- PLL Loop Bandwidth and Spread Spectrum
- PLL Applications (Spread Spectrum to Reduce EMI!)
- Dividing / Multiplying PLLs
- About Buffers
- Why 32.768 kHz for Real Time Clock?
- Why should we care about Jitter?
- About Jitter
Tool Articles
- Automatic Design Construction! ~PCI Express~
- Test bench allergy resolution
- Managing Warning Messages in Quartus Prime
- FPGA Configuration Without Launching Quartus Prime!?
- Pin Assignment in Quartus Prime - For those who prefer text-based
- Pin Assignment - What pin is this signal on?
- Inside the FPGA: The Curious Relationship with DSPs
- Comparing the Uses of RTL Viewer and Technology Map Viewer
- PLL IP Usage Notes - Pitfalls of Convenience
- IBIS, FPGA and Quartus II Triad - Specifications are Up to You
- Mega Functions - Memories are Rewind and fast-forward through troubles.
- MegaFunction 2 - Encounters with Errors are always sudden.
- The Chef’s Whimsical Test Bench – A Secret Recipe for Efficiency
- A little story about the I/O Standard - Tools follow the device
- Rescue the Lost Pins! FPGA Pin Assignments Part 1
- Rescue the Lost Pins! FPGA Pin Assignments Part 2
- Unused Pin Rhapsody - Part 1
- Unused Pin Rhapsody - Part 2
- Unused Pin Rhapsody - Extras
- Unused Pin Rhapsody - Extras
- Logic Synthesis and Place and Route
- Useful to know! Programming options!
- Easy Environment Reproduction with Archive Files
- Stratix 10 New Feature - The Mystery of Hyper-XX (What is a Hyper-registor?) ~
- Stratix 10 New Feature - The Mystery of Hyper-XX (What is Hyper-retiming?) ～Stratix 10 New Feature - The Mystery of Hyper-XX
Configuration articles
- What is configuration mode
- Selection of configuration ROM
- Configuration time
- Power On Reset
- FPGA initialization time
- FPGA POR vs. initialization
- MAX V POR circuit
- FPGA configuration sequence
- Programming? Configuration?
- Data Compression Speeds Up FPGA Configuration!
- FPP Mode Speeds Up FPGA Configuration!
- Configuration Time Reduction - Extra Edition
- Configuration Time Reduction - Extra Edition 2
- EPCS and EPCQ - Precautions when using them
Board Design Articles
- Regulators and FPGAs: An Uneasy Relationship
- Short or Open ? Open?
- Masuo's FPGA Board Fabrication #1 : Absolute Maximum Voltage Ratings
- Masuo's FPGA Board Fabrication #2 : Damping Resistors and Overshoots
- Masuo's FPGA Board Fabrication #3 : JTAG Configuration Failure...
- Masuo's FPGA Board Fabrication #4 : Power and GND Wiring is the Lifeline of the Board
- Masuo's FPGA Board Fabrication #5 : Notes on Measuring FPGA Boards with a Multimeter
- Masuo's FPGA Board Fabrication #6 : Measuring FPGA Current-Voltage Characteristics with a Curve Tracer
- I made a DCDC converter by myself! (1) "Explaining the process of making an evaluation board!
- How to make a DCDC converter by yourself! (2) "Introducing the process from component selection to assembly!
- (3) "Try to make a DCDC converter by myself! (3) "Introducing points to keep in mind when designing the layout!
- (4) "How to make a DCDC converter by yourself! (4) "No way to check the continuity of PCB board!
- I made a DCDC converter by myself! (5) "Challenge to Phase Adjustment!
- I made a DCDC converter by myself! (6) "Error between Simulation Result and Actual Device!
- I made a DC/DC converter with a universal PCB (1)
- I made a DC/DC converter with a universal PCB (2)
- I made a DC/DC converter with a universal PCB (3)
- I made a DC/DC converter with a universal PCB (4)
- Making a power supply with a home-made PCB! (1)
- Making a power supply with my own printed circuit board! (2)
- The Journey to My First Circuit Design (1) - Types of DC/DC converters
- The Journey to My First Circuit Design (2) - Selecting DC/DC converters
- The Journey to My First Circuit Design (3) - DC/DC converter board design
- The Journey to My First Circuit Design (4) - DC/DC converter implementation
- The Journey to My First Circuit Design (5) - DC/DC converter evaluation
- The Journey to My First Circuit Design (6) - The last story: extra
- Line trace car made from a power supply (DC/DC converter specification study)
- Line trace car made from a power supply (DC/DC converter implementation preparation)
- Line trace car made from a power supply (circuit implementation of a line trace car)
- Relationship between Quartus and Board Simulation - Derivation of IBIS File (1)
- Relationship between Quartus and Board Simulation - Derivation of IBIS File (2)
Device-related articles
- What is FPGA? Super Beginner's Guide
- What is FPGA?
- Intel Corporation: Stratix 10 FPGA & SoC Announcement - What is FPGA? ~
- ROM / RAM / FIFO in FPGA built-in memory block?
- Now you are no longer lost! How to estimate the amount of logic
- Overwrite inhibit ! Flash memory write
- What is a FIFO?
- About SER
- Masuo's FPGA Practice 1 "To operate PLL accurately (1)"
- Masuo's FPGA Practice 2 "To operate PLL accurately (2)
- FPGA I/O Functions - Programmable Current strength - Part 1
- FPGA I/O Functions - Programmable Current strength - Part 2
- FPGA I/O Functions - Open Drain ? Open Collector ? Tri-State ? -
- FPGA I/O functions - What is voltage conversion ? -
- FPGA I/O functions - Voltage conversion with Open Drain ! -
- Dofi's Failures - Part 1
HDL Design Articles
- Easily Describe Your Design! - Design Template Feature
- Let's use IP - See what's in IP -
- Difference between Verilog and VHDL - What I struggled with in conversion
- First time in Verilog HDL - Find the cause of Error! ～Verilog and Asynchronous Circuits
- Difference between synchronous and asynchronous circuits - Comparison -
- Difference between synchronous and asynchronous circuits - Theory -
- Difference between synchronous and asynchronous circuits - Conclusion -
- Difference between synchronous and asynchronous circuits - Extra Edition -
- Verilog HDL : How to write if statements
- Fill in all conditions in case statements
- Verilog HDL
- Divider of Clock
- Difference between VHDL and verilog HDL - signals with different bit widths
- Initial value problem in Verilog HDL
- Verilog HDL : Difference between blocking and non-blocking logic synthesis
- Test Venture Allergy Resolution
Power Supply / Power Consumption Articles
- Power Supply Selection with EPE!
- Power Supplies for Multiple FPGAs - What is the Role of Each?
- Power Supplies for Multiple FPGAs - Power Sharing Considerations
- Be Careful! Restrictions on Power Startup
- You can choose! How to Estimate Power Consumption - PowerPlay Power Analyzer Edition
- DC-DC Converters - Secrets of Voltage Conversion
- What is a Power Supply, the Source of Power?
- Which is better? ～Linear or Switching?
Timing Analysis Articles
- Timing Analysis Series 1 "Timing Analysis Concepts"
- Timing Analysis Series 2 "What is an SDC File?"
- Timing Analysis Series 3 "Understanding Commands in SDC Descriptions!"
- Timing Analysis Series 4: Timing Analysis Results Expressed in Slack Values!"
- Timing Analysis Series 5 "Optimizing Performance 1"
- Timing Analysis Series 6 "Optimizing Performance 2"
- Timing Analysis Flow - Up to Constraints -
- Timing Analysis - Defining FPGA Input Delay -
- How to set 30MHz as a Clock Constraint (It's that easy ... don't you think?)
Transceiver related articles
- Transceivers - What is PCI Express gen3 x8?
Communication related articles
- What's Communications? Acunoridge in Wonderland - Part 1 -
- What's Communications? Acunoridge in Wonderland - Part 2 -
Extra
- Machine Learning to Optimize Quartus® Prime Settings?
Disclaimer and Cautions on Use
This page is subject to change without notice.
We are not responsible for the effects of operating the circuits, technologies, and programs discussed in this page.
This page is a supplementary document for the use of the product. Please use the English version of this document when using the product.
Please note that the information on this page may not be the most up-to-date available.