In this column, we introduce "FPGA technical information that is surprisingly little known but makes a difference if you know it.
The contents are useful for a wide range of people from FPGA beginners to experienced designers, so please stay with us until the end.
Part 2: Verification Methods Not Recommended for Designs Already in Production
A certain company has decided to share a large amount of design data created by various departments within the company as in-house IP.
However, bugs were found in some IP that had already been used in mass production and had a proven track record.
Although there were no problems in the mass-produced products after verifying the functionality through logic simulation and further verifying at the system level on actual devices, when the same IP was used in different applications, defects occurred due to usage that was not anticipated by the IP designers.
ABV (Assertion-Based Verification)
As a countermeasure, we introduced ABV (Assertion-Based Verification).
Using a randomly generated testbench with ABV, "unexpected motion" can be verified, increasing the possibility of finding bugs that the
designers are unaware of.
When we ran ABV on other IP that has already been proven in mass production, we still found multiple bugs.
Since recent designs have a deeper hierarchy, it is difficult to find bugs in the front part of the circuit even if verified on the actual device
(because false signals do not easily reach the output pins).
The combination of ABV and logic simulation can improve the quality of the design.
- ABV is effective in finding bugs in the front part of the circuit
- Logic simulation is effective in finding bugs in the later stages of the circuit.
For details of ABV, click here.
- Questa / ModelSim - Assertion-Based Verification - Semiconductor Business - Macnica (macnica.co.jp)
FPGA: The Only Thing You Need to Know Series
Power Consumption
- Part 1: Three Tips for Low Power Consumption
- Part 2: Is Clock Gating (Gated Clock) Effective?
- Part 3: Is this leakage power? No, it is DC power.
- Part 4: Why Precision Power Simulators Were Never Used
- Part 5: Is this the ultimate low-power method?
- Part 6: How to Reduce Load Capacitance (C)
- Part 7: How to Reduce Signal Amplitude (Vs) and Supply Voltage (VCC)
- Part 8: How to reduce the operating frequency (F) and toggle ratio (N).
- Part 9: How to Reduce Short-Circuit Power
- Part 10: How to reduce DC power and leakage power
Verification
- Part 1: What is the first thing to ask designers who are concerned about design quality?
- Part 2: Verification methods not recommended for designs that have already been commercialized.
- Part 3: Verification is a combination of various methods.
- Part 4: FPGAs have more defects than ASICs - Asynchronous clocks.
- Part 5: What is formal verification?